component
LP3875EMP-5.0
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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LP3875EMP-5.0
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-5
LP3875EMP-5.0 from Texas Instruments, in a SOT-223-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD | input | Shutdown pin that must be pulled high through a 10-kΩ pullup resistor, with SD voltage limited to −0.3 V to 7 V, and pulling it low places the regulator in shutdown with about 10-nA quiescent current. |
| 2 | IN | power_in | Input supply pin for the 2.5 V to 7 V operating range, with an absolute maximum IN-to-GND voltage of −0.3 V to 7.5 V. |
| 3 | OUT | power_out | Regulated output voltage pin, with an absolute maximum OUT-to-GND voltage of −0.3 V to 6 V and a maximum DC output current of 1.5 A. |
| 4 | SENSE | input | Remote voltage sense pin that improves regulation at remote loads on the LP3875, with SENSE-to-GND voltage limited to VOUT. |
| 5 | GND | power_in | Ground reference pin for the regulator, which is the return for the IN and OUT pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage tolerance | VOUT | -1.5 | 0 | 1.5 | % | VOUT +1 V ≤ VIN ≤ 7 V, 10 mA ≤ IL ≤ 1.5 A | 5 |
| Output voltage tolerance over temperature | VOUT | -3 | 3 | % | VOUT +1 V ≤ VIN ≤ 7 V, 10 mA ≤ IL ≤ 1.5 A, -40°C ≤ TJ ≤ 125°C | 5 | |
| Dropout voltage | 38 | 50 | mV | IL = 150 mA | 5 | ||
| Dropout voltage over temperature | 60 | mV | IL = 150 mA, -40°C ≤ TJ ≤ 125°C | 5 | |||
| Dropout voltage | 380 | 450 | mV | IL = 1.5 A | 5 | ||
| Dropout voltage over temperature | 550 | mV | IL = 1.5 A, -40°C ≤ TJ ≤ 125°C | 5 | |||
| Ground pin current in normal operation mode | IGND | 5 | 9 | mA | IL = 150 mA | 5 | |
| Ground pin current in normal operation mode over temperature | IGND | 10 | mA | IL = 150 mA, -40°C ≤ TJ ≤ 125°C | 5 | ||
| Ground pin current in normal operation mode | IGND | 6 | 14 | mA | IL = 1.5 A | 5 | |
| Ground pin current in normal operation mode over temperature | IGND | 15 | mA | IL = 1.5 A, -40°C ≤ TJ ≤ 125°C | 5 | ||
| Ground pin current in shutdown mode | IGND | 0.01 | 10 | µA | VSD ≤ 0.3 V | 5 | |
| Ground pin current in shutdown mode over temperature | IGND | 50 | µA | -40°C ≤ TJ ≤ 85°C | 5 | ||
| Shutdown threshold high | VSDT | 2 | V | Output = High, -40°C ≤ TJ ≤ 125°C | 5 | ||
| Shutdown threshold low | VSDT | 0.3 | V | Output = Low, -40°C ≤ TJ ≤ 125°C | 5 | ||
| ERROR flag threshold over temperature | VT | 5 | 16 | % | See(5), -40°C ≤ TJ ≤ 125°C | 5 | |
| ERROR flag threshold hysteresis over temperature | VTH | 2 | 8 | % | See(5), -40°C ≤ TJ ≤ 125°C | 5 | |
| ERROR flag saturation voltage over temperature | VEF(Sat) | 0.1 | V | Isink = 100 µA, -40°C ≤ TJ ≤ 125°C | 5 | ||
| VIN supply voltage | VIN | 2.5 | 7 | V | 4 | ||
| Shutdown (SD) voltage | VSD | -0.3 | 7 | V | 4 | ||
| Maximum operating current (DC) | IOUT | 1.5 | A | 4 | |||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Lead temperature (soldering) | 260 | °C | soldering, 5 sec. | 4 | |||
| IN pin to GND pin voltage | VIN | -0.3 | 7.5 | V | 4 | ||
| Shutdown (SD) pin to GND pin voltage | VSD | -0.3 | 7.5 | V | 4 | ||
| OUT pin to GND pin voltage | VOUT | -0.3 | 6 | V | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance (SOT-223, NDC) | RθJA | 65.2 | °C/W | 5 pins, SOT-223 NDC package | 4 | ||
| Junction-to-case (top) thermal resistance (SOT-223, NDC) | RθJC(top) | 47.2 | °C/W | 5 pins, SOT-223 NDC package | 4 | ||
| Junction-to-board thermal resistance (SOT-223, NDC) | RθJB | 9.9 | °C/W | 5 pins, SOT-223 NDC package | 4 | ||
| Junction-to-top characterization parameter (SOT-223, NDC) | ψJT | 3.4 | °C/W | 5 pins, SOT-223 NDC package | 4 | ||
| Junction-to-board characterization parameter (SOT-223, NDC) | ψJB | 9.7 | °C/W | 5 pins, SOT-223 NDC package | 4 |
CAD (KiCad official)
- Symbol:
LP3875EMP-5.0 - Footprint:
Package_TO_SOT_SMD:SOT-223-5 - 3D model: SOT-223-5 (KiCad packages3D, STEP)
- 3D model files:
lp3875emp-5-0-etched.step/lp3875emp-5-0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3875emp-5-0.step/lp3875emp-5-0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
6a8b5890967893c1, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).