component
LP38692MP-ADJ
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLP38692MP-ADJ
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-5
LP38692MP-ADJ from Texas Instruments, in a SOT-223-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADJ | passive | Adjust pin; sets regulated output voltage via external resistors R1 and R2 per VOUT = VADJ × (1 + R1/R2); VADJ = 1.25 V typical with ±2.0% accuracy at 25 °C; ADJ input leakage current ≤ ±100 nA (VIN = 10 V). |
| 2 | VOUT | power_out | Regulated output voltage; adjustable range 1.25 V to 9 V; rated 1 A continuous output; dropout voltage 450 mV typical (800 mV max) at IL = 1 A, VO = 5 V; requires ≥ 1 µF ceramic output capacitor within 1 cm for loop stability. |
| 3 | VEN | input | Enable input (LP38692-ADJ only); output turns OFF when VEN ≤ 0.4 V (quiescent current falls to 1 µA max); output turns ON when VEN ≥ 1.8 V at VIN = 4 V, ≥ 3.0 V at VIN = 6 V, ≥ 4.0 V at VIN = 10 V; no internal pull-up or pull-down; must be actively or passively terminated; pin leakage ≤ ±1 µA. |
| 4 | GND | power_in | Circuit ground reference; large exposed tab in SOT-223 package, thermally bonded to die substrate; serves as heatsink connection when soldered to copper area; θJ-A ≈ 125 °C/W (minimum copper area) to 70 °C/W (1 sq. in. copper area). |
| 5 | VIN | power_in | Input supply voltage; operating range 2.7 V to 10 V, absolute maximum 12 V with respect to GND; quiescent current 55 µA typical (100 µA max) at full load; requires ≥ 1 µF ceramic input capacitor located within 1 cm of pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
LP38692MP-ADJ - Footprint:
Package_TO_SOT_SMD:SOT-223-5 - 3D model: SOT-223-5, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.45 mm nominal SOT height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lp38692mp-adj-etched.step/lp38692mp-adj-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp38692mp-adj.step/lp38692mp-adj.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
4c38576ee03a53de, retrieved 2026-10-01, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).