component
LP3855EMP-ADJ
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP3855EMP-ADJ
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-5
LP3855EMP-ADJ from Texas Instruments, in a SOT-223-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD | input | Shutdown input: a CMOS logic low turns the regulator off, the pin must be tied to VIN if unused, and its operating voltage range is -0.3V to 7.0V. |
| 2 | VIN | power_in | Input supply with an operating range of 2.5V to 7.0V; the minimum VIN is the greater of VOUT(NOM) + VDROPOUT or 2.5V, and a input capacitor of at least 10µF is required. |
| 3 | VOUT | power_out | Regulated output with a survival range of -0.3V to +6.0V, which requires an output capacitor of at least 10µF connected directly to the output and ground pins for loop stability. |
| 4 | ADJ | input | Output voltage set pin, referenced to a typical 1.216V, with VOUT = 1.216 x (1 + R1/R2) and a typical input bias current of about 10 nA. |
| 5 | GND | power_in | Ground pin, to be connected to the external circuit ground as a single point ground with the input and output capacitor returns. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
LP3855EMP-ADJ - Footprint:
Package_TO_SOT_SMD:SOT-223-5 - 3D model: SOT-223-5, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.45 mm nominal SOT height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
lp3855emp-adj-etched.step/lp3855emp-adj-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3855emp-adj.step/lp3855emp-adj.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
d1610e06156c9fbe, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP3855EMP-ADJ
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-5
LP3855EMP-ADJ from Texas Instruments, in a SOT-223-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD | input | Shutdown input: a CMOS logic low turns the regulator off, the pin must be tied to VIN if unused, and its operating voltage range is -0.3V to 7.0V. |
| 2 | VIN | power_in | Input supply with an operating range of 2.5V to 7.0V; the minimum VIN is the greater of VOUT(NOM) + VDROPOUT or 2.5V, and a input capacitor of at least 10µF is required. |
| 3 | VOUT | power_out | Regulated output with a survival range of -0.3V to +6.0V, which requires an output capacitor of at least 10µF connected directly to the output and ground pins for loop stability. |
| 4 | ADJ | input | Output voltage set pin, referenced to a typical 1.216V, with VOUT = 1.216 x (1 + R1/R2) and a typical input bias current of about 10 nA. |
| 5 | GND | power_in | Ground pin, to be connected to the external circuit ground as a single point ground with the input and output capacitor returns. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `LP3855EMP-ADJ`
- Footprint: `Package_TO_SOT_SMD:SOT-223-5`
- 3D model: SOT-223-5, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.45 mm nominal SOT height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `lp3855emp-adj-etched.step` / `lp3855emp-adj-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp3855emp-adj.step` / `lp3855emp-adj.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lp3855-adj) (23 pp, sha256 `d1610e06156c9fbe`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp3855emp-adj-datasheet.pdf)