component
LP38511MRX-ADJ
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLP38511MRX-ADJ
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP
LP38511MRX-ADJ from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated output voltage pin; must share current with Pin 2; rated for 800 mA maximum output current. |
| 2 | OUT | power_out | Regulated output voltage pin; must share current with Pin 1; rated for 800 mA maximum output current. |
| 3 | ADJ | input | Feedback to internal error amplifier to set output voltage; ADJ pin bias current is 1 nA typical; parallel resistance R1 |
| 4 | N/C | unconnected | No internal connection. |
| 5 | GND | power_in | Ground; device ground connection and thermal pad reference. |
| 6 | EN | input | Enable control input; pull high to enable output (1.2V ON threshold typical), low to disable (1.0V OFF threshold typical); no internal bias. |
| 7 | IN | power_in | Input supply voltage; accepts 2.25V to 5.5V range; must share current with Pin 8; requires 10 µF ceramic capacitor minimum. |
| 8 | IN | power_in | Input supply voltage; accepts 2.25V to 5.5V range; must share current with Pin 7; requires 10 µF ceramic capacitor minimum. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
LP38511MRX-ADJ - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lp38511mrx-adj-etched.step/lp38511mrx-adj-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp38511mrx-adj.step/lp38511mrx-adj.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
81da2b194ed6a9f4, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).