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LP3470A438DBVR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs lp3470a438dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers lp3470a438dbvr: viewers · Ray 1mo ago
lp3470a438dbvr-etched.fit.json lp3470a438dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lp3470a438dbvr-etched.glb lp3470a438dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lp3470a438dbvr-etched.step lp3470a438dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
lp3470a438dbvr.glb Publish 0.1.0 · Ray 1mo ago
lp3470a438dbvr.kicad_mod Publish 0.1.0 · Ray 1mo ago
lp3470a438dbvr.kicad_sym Publish 0.1.0 · Ray 1mo ago
lp3470a438dbvr.lbr Publish 0.1.0 · Ray 1mo ago
lp3470a438dbvr.step Publish 0.1.0 · Ray 1mo ago
package.json lp3470a438dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json lp3470a438dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/lp3470a438dbvr · Ray 1mo ago

LP3470A438DBVR

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

LP3470A438DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SRT input Reset timeout control input; connect a capacitor between this pin and ground to program reset delay period (tD = 619 × C₁ ms, where C₁ in µF), or leave floating for minimum 50 µs timeout.
2 GND power_in Ground reference and power return path.
3 VCC1 input Auxiliary supply pin that may be connected to VCC or left floating (do not connect to ground).
4 VCC power_in Main supply voltage input (0.95 V to 10 V) monitored to generate reset signal when voltage falls below negative-going threshold (VIT-).
5 RESET tri_state Open-drain active-low reset output that asserts low when VCC drops below VIT- and remains asserted for the programmed delay period (tD) after VCC exceeds VIT- plus hysteresis (VHYS).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: LP3470A438DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lp3470a438dbvr-etched.step / lp3470a438dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3470a438dbvr.step / lp3470a438dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 fa8d06416d59a8cf, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF