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docs lp3219ab5f: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lp3219ab5f-etched.fit.json lp3219ab5f: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lp3219ab5f-etched.glb lp3219ab5f: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lp3219ab5f-etched.step lp3219ab5f: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lp3219ab5f.glb Publish 0.1.0 · Ray
lp3219ab5f.kicad_mod Publish 0.1.0 · Ray
lp3219ab5f.kicad_sym Publish 0.1.0 · Ray
lp3219ab5f.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
lp3219ab5f.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json lp3219ab5f: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md lp3219ab5f: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LP3219AB5F

LOWPOWER · DC-DC Converters · SOT-23-5

LP3219AB5F from LOWPOWER, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable pin, active high. Drive above VEN(H)=1.4V to enable, below VEN(L)=0.4V to shut down (ISHDN < 1uA). Internal 500kΩ pull-down when floating.
2 GND power_in Device ground return. Connect to the system ground plane; input and output capacitor return currents should share this node.
3 LX output Switch node. Connects to the drains of the internal high-side (P-ch, ~80mΩ) and synchronous low-side (~70mΩ) power MOSFETs. Tie the external inductor between LX and VOUT.
4 VIN power_in Supply input, 2.5V to 5.5V (absolute max 6.5V). Must be closely decoupled to GND with a 22µF or greater ceramic capacitor.
5 FB input Feedback input. Connect to the center tap of the external resistor divider from VOUT. Regulation threshold is 0.6V typical (0.585V-0.615V); VOUT = 0.6 × (1 + R1/R2).

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • LP3219AB5F

CAD (KiCad official)

  • Symbol: LP3219AB5F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lp3219ab5f-etched.step / lp3219ab5f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3219ab5f.step / lp3219ab5f.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lp3219ab5f.step 85 KB You want the bare part, or you mark your own boards.
lp3219ab5f-etched.step 1.9 MB You want the part with LP3219AB5F already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 475 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (12 pp, sha256 c521946861893107, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF