component
LP2998QMRX
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 29d ago |
| viewers | 29d ago |
| lp2998qmrx-etched.glb | 29d ago |
| lp2998qmrx-etched.step | 29d ago |
| lp2998qmrx-hero.glb | 29d ago |
| lp2998qmrx-hero.overlay.json | 29d ago |
| lp2998qmrx.glb | 29d ago |
| lp2998qmrx.kicad_mod | 29d ago |
| lp2998qmrx.kicad_sym | 29d ago |
| lp2998qmrx.lbr | 29d ago |
| lp2998qmrx.step | 29d ago |
| package.json | 29d ago |
| page.json | 29d ago |
| README.md | 29d ago |
LP2998QMRX
Texas Instruments · Power Management - Specialized · SO-8
LP2998QMRX from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator; the exposed pad must also be connected to ground. |
| 2 | SD | input | Active-low shutdown pin that tri-states VTT while VREF stays active; it has an internal pull-up so it can connect to AVIN or be left open, and its input voltage is limited to 0 V to AVIN. |
| 3 | VSENSE | input | Feedback pin for regulating VTT, which should be connected to the middle of the termination bus for improved remote load regulation, or to VTT if remote regulation is not used. |
| 4 | VREF | power_in | Buffered output of the internal reference VDDQ/2 for the chipset and memory, recommended to be bypassed with a 0.1 µF to 0.01 µF ceramic capacitor, and it remains active during shutdown. |
| 5 | VDDQ | input | Input used to create the internal reference equal to VDDQ/2, which must be less than 2 x (AVIN - 1) or 6 V, whichever is smaller, per the absolute maximum ratings. |
| 6 | AVIN | power_in | Supply pin for the internal control circuitry, with a recommended range of 2.2 V to 5.5 V referenced to GND. |
| 7 | PVIN | power_in | Supply rail for the VTT output stage, which must be equal to or lower than AVIN and is recommended to be 3.3 V or less to avoid thermal limiting. |
| 8 | VTT | power_out | Regulated termination output that sinks and sources a continuous current of 1.5 A with transient peaks up to 3 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LP2998QMRX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
lp2998qmrx-etched.step/lp2998qmrx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2998qmrx.step/lp2998qmrx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
8f3b293771e0fafc, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).