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LP2998QMRE
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Texas Instruments Power Management - Specialized, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP2998QMRE
Texas Instruments · Power Management - Specialized · SO-8
LP2998QMRE from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | SD | input | Active-low shutdown pin that tri-states VTT when pulled low; it has an internal pull-up so it can be tied to AVIN or left open to enable the part, and the SD input is rated 0 V to AVIN. |
| 3 | VSENSE | input | Feedback pin for regulating VTT, best connected to the middle of the termination bus for remote load regulation, and it must still be connected to VTT if remote regulation is not used. |
| 4 | VREF | power_in | Buffered output of the internal reference VDDQ/2 for the chipset and DIMMs, which stays active during shutdown and thermal shutdown and should draw very little current. |
| 5 | VDDQ | input | Input used to create the internal reference equal to VDDQ/2 that sets VTT, best connected as a remote sense to the DIMM 2.5 V rail, and limited to a maximum of 6 V (or less than 2 x (AVIN - 1)). |
| 6 | AVIN | power_in | Input supply for all internal control circuitry, specified at 2.2 V to 5.5 V relative to GND. |
| 7 | PVIN | power_in | Power input for the VTT output stage that must be equal to or lower than AVIN, with 0 V to AVIN recommended and rails at or below 3.3 V advised to avoid thermal limiting. |
| 8 | VTT | power_out | Regulated output that sources and sinks current to terminate the bus resistors at VDDQ/2, rated for 1.5 A continuous and transient peaks up to 3 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LP2998QMRE - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
lp2998qmre-etched.step/lp2998qmre-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2998qmre.step/lp2998qmre.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
8f3b293771e0fafc, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP2998QMRE
**Texas Instruments** · Power Management - Specialized · SO-8
LP2998QMRE from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | SD | input | Active-low shutdown pin that tri-states VTT when pulled low; it has an internal pull-up so it can be tied to AVIN or left open to enable the part, and the SD input is rated 0 V to AVIN. |
| 3 | VSENSE | input | Feedback pin for regulating VTT, best connected to the middle of the termination bus for remote load regulation, and it must still be connected to VTT if remote regulation is not used. |
| 4 | VREF | power_in | Buffered output of the internal reference VDDQ/2 for the chipset and DIMMs, which stays active during shutdown and thermal shutdown and should draw very little current. |
| 5 | VDDQ | input | Input used to create the internal reference equal to VDDQ/2 that sets VTT, best connected as a remote sense to the DIMM 2.5 V rail, and limited to a maximum of 6 V (or less than 2 x (AVIN - 1)). |
| 6 | AVIN | power_in | Input supply for all internal control circuitry, specified at 2.2 V to 5.5 V relative to GND. |
| 7 | PVIN | power_in | Power input for the VTT output stage that must be equal to or lower than AVIN, with 0 V to AVIN recommended and rails at or below 3.3 V advised to avoid thermal limiting. |
| 8 | VTT | power_out | Regulated output that sources and sinks current to terminate the bus resistors at VDDQ/2, rated for 1.5 A continuous and transient peaks up to 3 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `LP2998QMRE`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `lp2998qmre-etched.step` / `lp2998qmre-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2998qmre.step` / `lp2998qmre.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lp2998-q1) (42 pp, sha256 `8f3b293771e0fafc`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp2998qmre-datasheet.pdf)