component
LP2997MX
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLP2997MX
Texas Instruments · Power Management - Specialized · SOIC-8
LP2997MX from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the regulator. |
| 2 | SD | input | Active-low shutdown pin for suspend-to-RAM: pulling it low tri-states VTT while VREF stays active, with a minimum high level of 1.9V and a maximum low level of 0.8V; it has an internal pull-up, so it can be tied to AVIN or left open to keep the part on. |
| 3 | VSENSE | input | Feedback input for regulating VTT, intended to be connected to the middle of the termination bus for improved remote load regulation, and it must still be connected to VTT if remote sensing is not used. |
| 4 | VREF | power_in | Buffered output of the internal reference VDDQ/2 for the chipset and memory, which stays active during shutdown and thermal shutdown and is recommended to be bypassed with a 0.1 µF to 0.01 µF ceramic capacitor. |
| 5 | VDDQ | input | Input used to generate the internal reference for VTT (VDDQ/2), presenting about 100 kΩ impedance; for SSTL-18 it is a 1.8V signal and can be sensed remotely at the DIMM. |
| 6 | AVIN | power_in | Supply input for the internal control circuitry, specified at 2.2V to 5.5V and required to be greater than or equal to PVIN. |
| 7 | PVIN | power_in | Supply rail for the VTT output stage, recommended at 1.8V or 2.5V and never allowed to exceed AVIN. |
| 8 | VTT | power_out | Regulated termination output equal to VDDQ/2 that sources and sinks up to ±0.5A continuous and tri-states in shutdown or thermal shutdown. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LP2997MX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
lp2997mx-etched.step/lp2997mx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2997mx.step/lp2997mx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
db63c8b8af1fb897, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).