component
LP2985IM5X-4.5
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
LP2985IM5X-4.5
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
LP2985IM5X-4.5 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; use a capacitor with a value of 1µF or larger from this pin to ground. |
| 2 | GND | power_in | Ground pin of the regulator. |
| 3 | ON/OFF | input | Enable pin: driving it high enables the device and driving it low disables it; tie to VIN if unused. |
| 4 | BYPASS | bidirectional | Connecting an external capacitor between the BYPASS pin and ground reduces reference voltage noise. |
| 5 | VOUT | power_out | Regulator output; use a capacitor with a value of 2.2µF or larger from this pin to ground, with nominal output capacitance greater than 2.2µF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous input voltage range (new chip) | VIN | -0.3 | 18 | V | 4 | ||
| Output voltage range (new chip); max is VIN + 0.3 or 9 V, whichever is smaller | VOUT | -0.3 | V | 4 | |||
| ON/OFF pin voltage range (new chip) | VON/OFF | -0.3 | 18 | V | 4 | ||
| Operating junction temperature | TJ | -55 | 150 | °C | 4 | ||
| Supply input voltage (new chip) | VIN | 2.5 | 16 | V | 4 | ||
| Output voltage (new chip) | VOUT | 1.2 | 5 | V | 4 | ||
| Enable voltage (new chip) | VON/OFF | 0 | 16 | V | 4 | ||
| Output current | IOUT | 0 | 150 | mA | 4 | ||
| Output capacitance (new chip) | COUT | 1 | 2.2 | 200 | μF | 4 | |
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Output voltage tolerance | ΔVOUT | -0.5 | 0.5 | % | IL = 1 mA | 5 | |
| Output voltage tolerance | ΔVOUT | -1 | 1 | % | 1 mA ≤ IL ≤ 50 mA, -40°C ≤ TJ ≤ 125°C | 5 | |
| Line regulation | ΔVOUT(ΔVIN) | 0.002 | 0.014 | %/V | VO(NOM) + 1 V ≤ VIN ≤ 16 V | 6 | |
| Line regulation | ΔVOUT(ΔVIN) | 0.002 | 0.032 | %/V | VO(NOM) + 1 V ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 6 | |
| Dropout voltage | VIN - VOUT | 1 | 2.75 | mV | IOUT = 0 mA | 6 | |
| Dropout voltage | VIN - VOUT | 3 | mV | IOUT = 0 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage | VIN - VOUT | 11.5 | 14 | mV | IOUT = 1 mA | 6 | |
| Dropout voltage | VIN - VOUT | 17 | mV | IOUT = 1 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage | VIN - VOUT | 98 | 115 | mV | IOUT = 10 mA | 6 | |
| Dropout voltage | VIN - VOUT | 148 | mV | IOUT = 10 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage | VIN - VOUT | 120 | 145 | mV | IOUT = 50 mA | 6 | |
| Dropout voltage | VIN - VOUT | 184 | mV | IOUT = 50 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| Dropout voltage | VIN - VOUT | 180 | 198 | mV | IOUT = 150 mA | 6 | |
| Dropout voltage | VIN - VOUT | 254 | mV | IOUT = 150 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| GND pin current | IGND | 69 | 95 | µA | IOUT = 0 mA | 6 | |
| GND pin current | IGND | 123 | µA | IOUT = 0 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| GND pin current | IGND | 78 | 110 | µA | IOUT = 1 mA | 6 | |
| GND pin current | IGND | 140 | µA | IOUT = 1 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| GND pin current | IGND | 175 | 210 | µA | IOUT = 10 mA | 6 | |
| GND pin current | IGND | 250 | µA | IOUT = 10 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| GND pin current | IGND | 380 | 440 | µA | IOUT = 50 mA | 6 | |
| GND pin current | IGND | 650 | µA | IOUT = 50 mA, -40°C ≤ TJ ≤ 125°C | 6 | ||
| GND pin current | IGND | 765 | 890 | µA | IOUT = 150 mA | 6 | |
| GND pin current | IGND | 1060 | µA | IOUT = 150 mA, -40°C ≤ TJ ≤ 125°C | 7 | ||
| GND pin current (shutdown) | IGND | 1.25 | 1.75 | µA | VON/OFF < 0.3 V, VIN = 16 V | 7 | |
| GND pin current (shutdown) | IGND | 1.12 | 2.25 | µA | VON/OFF < 0.15 V, VIN = 16 V, -40°C ≤ TJ ≤ 85°C | 7 | |
| GND pin current (shutdown) | IGND | 1.12 | 2.75 | µA | VON/OFF < 0.15 V, VIN = 16 V, -40°C ≤ TJ ≤ 125°C | 7 | |
| Rising bias supply UVLO | VUVLO+ | 2.2 | 2.4 | V | VIN rising, -40°C ≤ TJ ≤ 125°C | 7 | |
| Low-level ON/OFF input voltage (output OFF) | VON/OFF | 0.72 | V | Low = Output OFF | 7 | ||
| Low-level ON/OFF input voltage (output OFF) | VON/OFF | 0.15 | V | Low = Output OFF, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 | ||
| High-level ON/OFF input voltage (output ON) | VON/OFF | 0.85 | V | High = Output ON | 7 | ||
| High-level ON/OFF input voltage (output ON) | VON/OFF | 1.6 | V | High = Output ON, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 | ||
| ON/OFF input current | ION/OFF | 0.42 | µA | VON/OFF = 0 V | 7 | ||
| ON/OFF input current | ION/OFF | -0.9 | µA | VON/OFF = 0 V, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 | ||
| ON/OFF input current | ION/OFF | 0.011 | µA | VON/OFF = 5 V | 7 | ||
| ON/OFF input current | ION/OFF | 2.2 | µA | VON/OFF = 5 V, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 | ||
| Peak output current | IO(PK) | 300 | 350 | mA | VOUT ≥ VO(NOM) -5% (steady state) | 7 | |
| Short output current | IO(SC) | 375 | mA | RL = 0 Ω (steady state) | 7 | ||
| Junction-to-ambient thermal resistance | RθJB | 47.2 | °C/W | New Chip, DBV (SOT23-5) | 5 | ||
| Falling bias supply UVLO | VUVLO- | 1.9 | V | VIN falling, -40°C ≤ TJ ≤ 125°C | 7 | ||
| UVLO hysteresis | VUVLO(HYST) | 0.13 | V | -40°C ≤ TJ ≤ 125°C | 7 | ||
| Ripple rejection | ΔVO/ΔVIN | 78 | dB | f = 1 kHz, CBYPASS = 10 nF, COUT = 10 µF | 7 | ||
| Output noise voltage | Vn | 30 | µVRMS | Bandwidth = 300 Hz to 50 kHz, CBYPASS = 10 nF, COUT = 2.2 µF, VOUT = 3.3 V, ILOAD = 150 mA | 7 | ||
| Thermal shutdown threshold (shutdown, temperature increasing) | Tsd+ | 170 | °C | Shutdown, temperature increasing | 7 | ||
| Thermal shutdown reset (temperature decreasing) | Tsd- | 150 | °C | Reset, temperature decreasing | 7 | ||
| Junction-to-ambient thermal resistance | RθJA | 178.6 | °C/W | New Chip, DBV (SOT23-5) | 5 | ||
| Junction-to-top characterization parameter | ψJT | 15.9 | °C/W | New Chip, DBV (SOT23-5) | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor, and to the LDO ground pin as close as possible to each other, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is stron | 28 |
CAD (KiCad official)
- Symbol:
LP2985IM5X-4.5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lp2985im5x-4-5-etched.step/lp2985im5x-4-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2985im5x-4-5.step/lp2985im5x-4-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
307d388652f2fc7d, retrieved 2026-11-05, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP2985IM5X-4.5
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
LP2985IM5X-4.5 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; use a capacitor with a value of 1µF or larger from this pin to ground. |
| 2 | GND | power_in | Ground pin of the regulator. |
| 3 | ON/OFF | input | Enable pin: driving it high enables the device and driving it low disables it; tie to VIN if unused. |
| 4 | BYPASS | bidirectional | Connecting an external capacitor between the BYPASS pin and ground reduces reference voltage noise. |
| 5 | VOUT | power_out | Regulator output; use a capacitor with a value of 2.2µF or larger from this pin to ground, with nominal output capacitance greater than 2.2µF. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous input voltage range (new chip) | VIN | -0.3 | | 18 | V | | 4 |
| Output voltage range (new chip); max is VIN + 0.3 or 9 V, whichever is smaller | VOUT | -0.3 | | | V | | 4 |
| ON/OFF pin voltage range (new chip) | VON/OFF | -0.3 | | 18 | V | | 4 |
| Operating junction temperature | TJ | -55 | | 150 | °C | | 4 |
| Supply input voltage (new chip) | VIN | 2.5 | | 16 | V | | 4 |
| Output voltage (new chip) | VOUT | 1.2 | | 5 | V | | 4 |
| Enable voltage (new chip) | VON/OFF | 0 | | 16 | V | | 4 |
| Output current | IOUT | 0 | | 150 | mA | | 4 |
| Output capacitance (new chip) | COUT | 1 | 2.2 | 200 | μF | | 4 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 4 |
| Output voltage tolerance | ΔVOUT | -0.5 | | 0.5 | % | IL = 1 mA | 5 |
| Output voltage tolerance | ΔVOUT | -1 | | 1 | % | 1 mA ≤ IL ≤ 50 mA, -40°C ≤ TJ ≤ 125°C | 5 |
| Line regulation | ΔVOUT(ΔVIN) | | 0.002 | 0.014 | %/V | VO(NOM) + 1 V ≤ VIN ≤ 16 V | 6 |
| Line regulation | ΔVOUT(ΔVIN) | | 0.002 | 0.032 | %/V | VO(NOM) + 1 V ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 6 |
| Dropout voltage | VIN - VOUT | | 1 | 2.75 | mV | IOUT = 0 mA | 6 |
| Dropout voltage | VIN - VOUT | | | 3 | mV | IOUT = 0 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| Dropout voltage | VIN - VOUT | | 11.5 | 14 | mV | IOUT = 1 mA | 6 |
| Dropout voltage | VIN - VOUT | | | 17 | mV | IOUT = 1 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| Dropout voltage | VIN - VOUT | | 98 | 115 | mV | IOUT = 10 mA | 6 |
| Dropout voltage | VIN - VOUT | | | 148 | mV | IOUT = 10 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| Dropout voltage | VIN - VOUT | | 120 | 145 | mV | IOUT = 50 mA | 6 |
| Dropout voltage | VIN - VOUT | | | 184 | mV | IOUT = 50 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| Dropout voltage | VIN - VOUT | | 180 | 198 | mV | IOUT = 150 mA | 6 |
| Dropout voltage | VIN - VOUT | | | 254 | mV | IOUT = 150 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| GND pin current | IGND | | 69 | 95 | µA | IOUT = 0 mA | 6 |
| GND pin current | IGND | | | 123 | µA | IOUT = 0 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| GND pin current | IGND | | 78 | 110 | µA | IOUT = 1 mA | 6 |
| GND pin current | IGND | | | 140 | µA | IOUT = 1 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| GND pin current | IGND | | 175 | 210 | µA | IOUT = 10 mA | 6 |
| GND pin current | IGND | | | 250 | µA | IOUT = 10 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| GND pin current | IGND | | 380 | 440 | µA | IOUT = 50 mA | 6 |
| GND pin current | IGND | | | 650 | µA | IOUT = 50 mA, -40°C ≤ TJ ≤ 125°C | 6 |
| GND pin current | IGND | | 765 | 890 | µA | IOUT = 150 mA | 6 |
| GND pin current | IGND | | | 1060 | µA | IOUT = 150 mA, -40°C ≤ TJ ≤ 125°C | 7 |
| GND pin current (shutdown) | IGND | | 1.25 | 1.75 | µA | VON/OFF < 0.3 V, VIN = 16 V | 7 |
| GND pin current (shutdown) | IGND | | 1.12 | 2.25 | µA | VON/OFF < 0.15 V, VIN = 16 V, -40°C ≤ TJ ≤ 85°C | 7 |
| GND pin current (shutdown) | IGND | | 1.12 | 2.75 | µA | VON/OFF < 0.15 V, VIN = 16 V, -40°C ≤ TJ ≤ 125°C | 7 |
| Rising bias supply UVLO | VUVLO+ | | 2.2 | 2.4 | V | VIN rising, -40°C ≤ TJ ≤ 125°C | 7 |
| Low-level ON/OFF input voltage (output OFF) | VON/OFF | | | 0.72 | V | Low = Output OFF | 7 |
| Low-level ON/OFF input voltage (output OFF) | VON/OFF | | | 0.15 | V | Low = Output OFF, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 |
| High-level ON/OFF input voltage (output ON) | VON/OFF | 0.85 | | | V | High = Output ON | 7 |
| High-level ON/OFF input voltage (output ON) | VON/OFF | 1.6 | | | V | High = Output ON, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 |
| ON/OFF input current | ION/OFF | | | 0.42 | µA | VON/OFF = 0 V | 7 |
| ON/OFF input current | ION/OFF | -0.9 | | | µA | VON/OFF = 0 V, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 |
| ON/OFF input current | ION/OFF | | | 0.011 | µA | VON/OFF = 5 V | 7 |
| ON/OFF input current | ION/OFF | | | 2.2 | µA | VON/OFF = 5 V, VOUT + 1 ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C | 7 |
| Peak output current | IO(PK) | 300 | | 350 | mA | VOUT ≥ VO(NOM) -5% (steady state) | 7 |
| Short output current | IO(SC) | | | 375 | mA | RL = 0 Ω (steady state) | 7 |
| Junction-to-ambient thermal resistance | RθJB | | 47.2 | | °C/W | New Chip, DBV (SOT23-5) | 5 |
| Falling bias supply UVLO | VUVLO- | | 1.9 | | V | VIN falling, -40°C ≤ TJ ≤ 125°C | 7 |
| UVLO hysteresis | VUVLO(HYST) | | 0.13 | | V | -40°C ≤ TJ ≤ 125°C | 7 |
| Ripple rejection | ΔVO/ΔVIN | | 78 | | dB | f = 1 kHz, CBYPASS = 10 nF, COUT = 10 µF | 7 |
| Output noise voltage | Vn | | 30 | | µVRMS | Bandwidth = 300 Hz to 50 kHz, CBYPASS = 10 nF, COUT = 2.2 µF, VOUT = 3.3 V, ILOAD = 150 mA | 7 |
| Thermal shutdown threshold (shutdown, temperature increasing) | Tsd+ | | 170 | | °C | Shutdown, temperature increasing | 7 |
| Thermal shutdown reset (temperature decreasing) | Tsd- | | 150 | | °C | Reset, temperature decreasing | 7 |
| Junction-to-ambient thermal resistance | RθJA | | 178.6 | | °C/W | New Chip, DBV (SOT23-5) | 5 |
| Junction-to-top characterization parameter | ψJT | | 15.9 | | °C/W | New Chip, DBV (SOT23-5) | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | capacitor, and to the LDO ground pin as close as possible to each other, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is stron | 28 |
## CAD (KiCad official)
- Symbol: `LP2985IM5X-4.5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `lp2985im5x-4-5-etched.step` / `lp2985im5x-4-5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2985im5x-4-5.step` / `lp2985im5x-4-5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lp2985-n) (48 pp, sha256 `307d388652f2fc7d`, retrieved 2026-11-05, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp2985im5x-4-5-datasheet.pdf)