component
LP2982AIM5X-3.0
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP2982AIM5X-3.0
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
LP2982AIM5X-3.0 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; use a capacitor of 1 µF or larger from this pin to ground, and the new chip accepts 2.5 V to 16 V with an 18 V absolute maximum continuous input. |
| 2 | GND | power_in | Ground pin for the LDO. |
| 3 | ON/OFF | input | Enable pin: driving it high enables the device and driving it low disables it, with thresholds given in the Electrical Characteristics table; tie to VIN if unused, and the absolute maximum voltage is -0.3 V to 18 V for the new chip. |
| 4 | BYPASS | bidirectional | Bypass pin for low-noise performance; an external capacitor between BYPASS and ground reduces reference voltage noise (datasheet cites 30 µVRMS output noise with a 10 nF bypass capacitor). |
| 5 | VOUT | power_out | Regulator output; use a capacitor of 2.2 µF or larger from this pin to ground, and the nominal output capacitance for the new chip must exceed 2.2 µF with effective capacitance at the pin above 1 µF after derating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
LP2982AIM5X-3.0 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lp2982aim5x-3-0-etched.step/lp2982aim5x-3-0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2982aim5x-3-0.step/lp2982aim5x-3-0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
a6252bcd74ed22a6, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP2982AIM5X-3.0
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
LP2982AIM5X-3.0 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; use a capacitor of 1 µF or larger from this pin to ground, and the new chip accepts 2.5 V to 16 V with an 18 V absolute maximum continuous input. |
| 2 | GND | power_in | Ground pin for the LDO. |
| 3 | ON/OFF | input | Enable pin: driving it high enables the device and driving it low disables it, with thresholds given in the Electrical Characteristics table; tie to VIN if unused, and the absolute maximum voltage is -0.3 V to 18 V for the new chip. |
| 4 | BYPASS | bidirectional | Bypass pin for low-noise performance; an external capacitor between BYPASS and ground reduces reference voltage noise (datasheet cites 30 µVRMS output noise with a 10 nF bypass capacitor). |
| 5 | VOUT | power_out | Regulator output; use a capacitor of 2.2 µF or larger from this pin to ground, and the nominal output capacitance for the new chip must exceed 2.2 µF with effective capacitance at the pin above 1 µF after derating. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `LP2982AIM5X-3.0`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `lp2982aim5x-3-0-etched.step` / `lp2982aim5x-3-0-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2982aim5x-3-0.step` / `lp2982aim5x-3-0.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lp2982) (44 pp, sha256 `a6252bcd74ed22a6`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp2982aim5x-3-0-datasheet.pdf)