component
LP2951-5.0DRG
Public Made by Adomby adom
HANSCHIP semiconductor Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LP2951-5.0DRG
HANSCHIP semiconductor · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8
LP2951-5.0DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated output; tie to SENSE for fixed 5 V output, rated for 100 mA with a minimum 1 µF output capacitor for 5-V versions. |
| 2 | SENSE | input | Remote sense input; tie to OUTPUT for the fixed 5 V output, or leave open when using an external resistor divider for adjustable output. |
| 3 | SHUTDOWN | input | Logic-compatible shutdown input; low (≤0.7 V) turns the regulator on and high (≥2 V) turns it off, with a 30 V maximum input. |
| 4 | GND | power_in | Ground. |
| 5 | ERROR | output | Open-collector error output that goes low when VOUT drops about 6% below nominal, needs an external pullup of 100 kΩ to 1 MΩ, sinks up to 400 µA, and may be left open if unused. |
| 6 | VTAP | output | Internal resistor divider tap; tie to FEEDBACK for the fixed output voltage, or leave open for adjustable operation. |
| 7 | FEEDBACK | input | Error amplifier feedback input compared against the 1.235 V reference; tie to VTAP for fixed output or to an external resistor divider for 1.235 V to 30 V adjustable output. |
| 8 | INPUT | power_in | Unregulated supply input, operating up to 30 V continuous (absolute maximum 30 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LP2951-5.0DRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
lp2951-5-0drg-etched.step/lp2951-5-0drg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp2951-5-0drg.step/lp2951-5-0drg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (21 pp, sha256
31b6b5142459b6a6, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).