component
LP28400AQVF
Public Made by Adomby adom
LOWPOWER Battery Management ICs, QFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP28400AQVF
LOWPOWER · Battery Management ICs · QFN-16-EP(3x3)
LP28400AQVF from LOWPOWER, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB | output | Gate control signal for the external pass transistor, also the compensation node for Boost. |
| 2 | EN | input | Enable pin, active high (chip enable VEN(ON) 1.4V, shutdown VEN(OFF) 0.4V). |
| 3 | VIN | power_in | Power input, 3V~12V operating range, absolute maximum 18V. |
| 4 | VL | power_out | Internal LDO output (5V typ); connect a 4.7uF decoupling capacitor to GNDP. |
| 5 | LG | output | Low side gate driver for the outside power MOSFET. |
| 6 | LX | passive | Switching node connection, absolute maximum 18V. |
| 7 | GNDP | power_in | Ground for the power section. |
| 8 | GNDA | power_in | Ground for the analog circuits. |
| 9 | THM | input | Thermistor input; charging inhibited if VTHM<0.28V(VL) or VTHM>0.74V(VL), normal operation between. |
| 10 | FULL | output | Battery full indication pin, active low. |
| 11 | STAT | output | Indicates charge status, active low when charging is on (open drain). |
| 12 | REG | input | Input voltage feedback for the input voltage regulation loop (reference 1V typ). |
| 13 | VB | power_in | Programmable battery-full voltage: connect to GND for 8.8V, float for 8.4V, connect to VL for 8.7V. |
| 14 | CELLS | input | Cell selection: connect to GND for 3 cells, float for 2 cells, connect to VL for 4 cells. |
| 15 | RS | input | Charge current sense input (with VBAT across RSENSE); indicates charging terminated. |
| 16 | VBAT | power_in | Sense pin for battery voltage. |
| 17 | GNDP | power_in | Exposed pad, ground for the power section. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | QFN-16-EP(3x3) |
| Category | Power Management ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Internal LDO output | V(VL) | 4.9 | 5 | 5.1 | V | VIN=6V | 5 |
| Input voltage regulation reference | VREG | 0.95 | 1 | 1.05 | V | 5 | |
| Program charging current sense voltage | V(RS,VBAT) | 47.5 | 50 | 52.5 | mV | From Rs to VBAT | 5 |
| Thermal protection | 135 | 145 | 155 | C | Not tested in production | 5 | |
| UVLO input voltage threshold | VIN | 2.65 | V | VIN increasing | 5 | ||
| UVLO hysteresis | VIN | 150 | mV | VIN decaying | 5 | ||
| Quiescent current | IQ | 1 | mA | 5 | |||
| Battery leakage current | IBAT | -10 | uA | VBAT=8.4V, VIN=NC | 5 | ||
| Battery leakage current | IBAT | -35 | uA | VBAT=8.4V, VIN=5V | 5 | ||
| Charge current limit | IBATLIMIT | 1.5 | A | VIN=5V | 5 | ||
| CV voltage | V(VBAT) | 8.4 | V | 5 | |||
| Recharge threshold | V(VBAT) | 300 | mV | 5 | |||
| End of charge threshold | V(RS,VBAT) | 5 | mV | From Rs to VBAT | 5 | ||
| Trickle charge voltage threshold | V(VBAT) | 6 | V | 5 | |||
| Trickle charge current | V(RS,VBAT) | 10 | mV | From Rs to VBAT | 5 | ||
| Switching frequency | LX | 1 | MHz | 5 | |||
| Chip enable | VEN(ON) | 1.4 | V | 5 | |||
| Chip shutdown | VEN(OFF) | 0.4 | V | 5 | |||
| STAT low level | STAT | 0.2 | V | Open drain pulled up with 5mA | 5 | ||
| Low side Rdson | R(LX,GND) | 60 | mΩ | From LX to GND | 5 | ||
| Maximum voltage VIN, LX, RS, VBAT, PB to GND | -0.3 | 18 | V | 4 | |||
| Maximum voltage VL to GND | -0.3 | 6 | V | 4 | |||
| Maximum voltage REG, STAT to GND | -0.3 | V | max is VL+0.3V | 4 | |||
| Maximum junction temperature | 150 | °C | 4 | ||||
| Operating junction temperature range | TJ | -40 | 85 | °C | 4 | ||
| Maximum soldering temperature | 260 | °C | at leads, 10 sec | 4 | |||
| ESD HBM | 2 | kV | 4 | ||||
| ESD MM | 200 | V | 4 | ||||
| Input voltage range | VIN | 3 | 12 | V | 1 |
CAD (KiCad official)
- Symbol:
LP28400AQVF - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
lp28400aqvf-etched.step/lp28400aqvf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp28400aqvf.step/lp28400aqvf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (10 pp, sha256
34513366435206d0, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP28400AQVF
**LOWPOWER** · Battery Management ICs · QFN-16-EP(3x3)
LP28400AQVF from LOWPOWER, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB | output | Gate control signal for the external pass transistor, also the compensation node for Boost. |
| 2 | EN | input | Enable pin, active high (chip enable VEN(ON) 1.4V, shutdown VEN(OFF) 0.4V). |
| 3 | VIN | power_in | Power input, 3V~12V operating range, absolute maximum 18V. |
| 4 | VL | power_out | Internal LDO output (5V typ); connect a 4.7uF decoupling capacitor to GNDP. |
| 5 | LG | output | Low side gate driver for the outside power MOSFET. |
| 6 | LX | passive | Switching node connection, absolute maximum 18V. |
| 7 | GNDP | power_in | Ground for the power section. |
| 8 | GNDA | power_in | Ground for the analog circuits. |
| 9 | THM | input | Thermistor input; charging inhibited if VTHM<0.28*V(VL) or VTHM>0.74*V(VL), normal operation between. |
| 10 | FULL | output | Battery full indication pin, active low. |
| 11 | STAT | output | Indicates charge status, active low when charging is on (open drain). |
| 12 | REG | input | Input voltage feedback for the input voltage regulation loop (reference 1V typ). |
| 13 | VB | power_in | Programmable battery-full voltage: connect to GND for 8.8V, float for 8.4V, connect to VL for 8.7V. |
| 14 | CELLS | input | Cell selection: connect to GND for 3 cells, float for 2 cells, connect to VL for 4 cells. |
| 15 | RS | input | Charge current sense input (with VBAT across RSENSE); indicates charging terminated. |
| 16 | VBAT | power_in | Sense pin for battery voltage. |
| 17 | GNDP | power_in | Exposed pad, ground for the power section. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | QFN-16-EP(3x3) |
| Category | Power Management ICs |
| Pins | 17 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Internal LDO output | V(VL) | 4.9 | 5 | 5.1 | V | VIN=6V | 5 |
| Input voltage regulation reference | VREG | 0.95 | 1 | 1.05 | V | | 5 |
| Program charging current sense voltage | V(RS,VBAT) | 47.5 | 50 | 52.5 | mV | From Rs to VBAT | 5 |
| Thermal protection | | 135 | 145 | 155 | C | Not tested in production | 5 |
| UVLO input voltage threshold | VIN | | 2.65 | | V | VIN increasing | 5 |
| UVLO hysteresis | VIN | | 150 | | mV | VIN decaying | 5 |
| Quiescent current | IQ | | | 1 | mA | | 5 |
| Battery leakage current | IBAT | | | -10 | uA | VBAT=8.4V, VIN=NC | 5 |
| Battery leakage current | IBAT | | | -35 | uA | VBAT=8.4V, VIN=5V | 5 |
| Charge current limit | IBATLIMIT | | 1.5 | | A | VIN=5V | 5 |
| CV voltage | V(VBAT) | | 8.4 | | V | | 5 |
| Recharge threshold | V(VBAT) | | 300 | | mV | | 5 |
| End of charge threshold | V(RS,VBAT) | | 5 | | mV | From Rs to VBAT | 5 |
| Trickle charge voltage threshold | V(VBAT) | | 6 | | V | | 5 |
| Trickle charge current | V(RS,VBAT) | | 10 | | mV | From Rs to VBAT | 5 |
| Switching frequency | LX | | 1 | | MHz | | 5 |
| Chip enable | VEN(ON) | 1.4 | | | V | | 5 |
| Chip shutdown | VEN(OFF) | | | 0.4 | V | | 5 |
| STAT low level | STAT | | | 0.2 | V | Open drain pulled up with 5mA | 5 |
| Low side Rdson | R(LX,GND) | | 60 | | mΩ | From LX to GND | 5 |
| Maximum voltage VIN, LX, RS, VBAT, PB to GND | | -0.3 | | 18 | V | | 4 |
| Maximum voltage VL to GND | | -0.3 | | 6 | V | | 4 |
| Maximum voltage REG, STAT to GND | | -0.3 | | | V | max is VL+0.3V | 4 |
| Maximum junction temperature | | | | 150 | °C | | 4 |
| Operating junction temperature range | TJ | -40 | | 85 | °C | | 4 |
| Maximum soldering temperature | | | | 260 | °C | at leads, 10 sec | 4 |
| ESD HBM | | | | 2 | kV | | 4 |
| ESD MM | | | | 200 | V | | 4 |
| Input voltage range | VIN | 3 | | 12 | V | | 1 |
## CAD (KiCad official)
- Symbol: `LP28400AQVF`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `lp28400aqvf-etched.step` / `lp28400aqvf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp28400aqvf.step` / `lp28400aqvf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LOWPOWER datasheet](docs/lp28400aqvf-datasheet.pdf) (10 pp, sha256 `34513366435206d0`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp28400aqvf-datasheet.pdf)