# LP2301ELT1G

**LRC** · MOSFETs · SOT-23

LP2301ELT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal with ESD protection (>1kV HBM); gate-to-source voltage limited to ±8V continuous. |
| 2 | Source | passive | Source terminal of the P-channel MOSFET, connected to the body diode anode side. |
| 3 | Drain | passive | Drain terminal; drain-source voltage rated -20V and continuous drain current -2.8A at TA = 25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | VBRDSS | -20 |  |  | V | VGS = 0, ID = -250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | VGS = 0, VDS = -9.6 V | 2 |
| Gate-Body Leakage Current, Forward | IGSS | -10 |  | 10 | μA | VGS = ±8 V | 2 |
| Gate Threshold Voltage | VGS(th) | -0.4 | -0.65 | -0.9 | V | VDS = VGS, ID = -250μA | 2 |
| Static Drain-Source On-State Resistance | RDS(on) |  | 90 | 110 | mΩ | VGS = -4.5 V, ID = -2.8 A | 2 |
| Static Drain-Source On-State Resistance | RDS(on) |  | 110 | 156 | mΩ | VGS = -2.5 V, ID = -2 A | 2 |
| Forward Voltage | VSD |  | -0.8 | -1.2 | V | VGS = 0 V, ISD = -0.75 A | 2 |
| Total Gate Charge | Qg(-10V) |  | 7.8 |  | nC | VDS = -10V, VGS = -10V, ID = -1.6A | 2 |
| Total Gate Charge | Qg(-4.5V) |  | 3.5 |  | nC | VDS = -10V, VGS = -4.5V, ID = -1.6A | 2 |
| Gate-Source Charge | Qgs |  | 0.5 |  | nC | VDS = -10V, VGS = -10V, ID = -1.6A | 2 |
| Gate-Drain Charge | Qgd |  | 1.2 |  | nC | VDS = -10V, VGS = -10V, ID = -1.6A | 2 |
| Drain-Source Voltage | VDSS |  |  | -20 | V |  | 1 |
| Gate-to-Source Voltage, Continuous | VGS | -8 |  | 8 | V | Continuous | 1 |
| Drain Current, Continuous | ID |  |  | -2.8 | A | Continuous TA = 25°C | 1 |
| Drain Current, Pulsed | IDM |  |  | -11 | A | Pulsed (Note 1) | 1 |
| Maximum Power Dissipation | PD |  |  | 0.9 | W | 1-in² 2oz Cu PCB board (Note 2) | 1 |
| Thermal Resistance, Junction-to-Ambient | RΘJA |  |  | 140 | ºC/W | 1-in² 2oz Cu PCB board (Note 2) | 1 |
| Junction and Storage Temperature | TJ,Tstg | -55 |  | 150 | ºC |  | 1 |

## CAD (KiCad official)

- Symbol: `LP2301ELT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lp2301elt1g-etched.step` / `lp2301elt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp2301elt1g.step` / `lp2301elt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603156329766793216) (6 pp, sha256 `775daf4a41ce861b`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lp2301elt1g-datasheet.pdf)