component

LNTK3043PT5G

Public Made by Adom

by adom

LRC MOSFETs, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 24d ago
viewers lntk3043pt5g: viewers · Ray 24d ago
lntk3043pt5g-etched.glb lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
lntk3043pt5g-etched.step lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
lntk3043pt5g-hero.glb lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
lntk3043pt5g-hero.overlay.json lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
lntk3043pt5g.glb plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago
lntk3043pt5g.kicad_mod Publish 0.1.0 · Ray 24d ago
lntk3043pt5g.kicad_sym Publish 0.1.0 · Ray 24d ago
lntk3043pt5g.lbr Publish 0.1.0 · Ray 24d ago
lntk3043pt5g.step plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 17d ago
package.json lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
page.json lntk3043pt5g: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
README.md Publish 0.1.0 · Ray 24d ago

LNTK3043PT5G

LRC · MOSFETs · SOT-723

LNTK3043PT5G from LRC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input MOSFET gate terminal, with gate-to-source voltage rated at ±10 V (VGS) and gate threshold VGS(TH) of 0.4 V to 1.3 V.
2 Source passive MOSFET source terminal, with body-diode source current rated at IS = 286 mA (Note 2).
3 Drain passive MOSFET drain terminal, with drain-to-source voltage rated at 20 V (VDSS) and continuous drain current of 255 mA at TA = 25°C steady state (Note 1).

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-723
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: LNTK3043PT5G
  • Footprint: Package_TO_SOT_SMD:SOT-723
  • 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lntk3043pt5g-etched.step / lntk3043pt5g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lntk3043pt5g.step / lntk3043pt5g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 254cc72b0c287a41, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF