# LN6206P332MR-G

**NATLINEAR** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

LN6206P332MR-G from NATLINEAR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground / negative supply reference (0 V). All internal reference, error amplifier, and pass-transistor return currents flow through this pin. Must be tied to system single-point GND. |
| 2 | VOUT | power_out | Regulated output. Provides the fixed output voltage set by the ordering suffix (3.3 V for the -332M variant) at up to 250 mA when VIN ≥ VOUT+1 V. Requires an output capacitor CL ≥ 0.1 µF (tantalum recommended) for loop stability. |
| 3 | VIN | power_in | Unregulated input supply. Operating range 1.8 V to 6.0 V (absolute max VSS+6 V). Should be bypassed with CIN ≥ 1.0 µF close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | NATLINEAR |
| Package | SOT-23-3L |
| Category | PMIC |
| Pins | 3 |

## Ordering variants

Same part, different packaging or reel option.

- `LN6206P332MR-GM`
- `LN6206P332MR-GV`
- `LN6206P332MR-GP`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Load regulation | VOUT |  | 20 | 40 | mV | VIN=VOUT(S)+1.0 V, 1.0 mA ≤ IOUT ≤ 50 mA | 5 |
| Input stability |  |  | 0.05 | 0.2 | %/V | VOUT(S)+0.5 V ≤ VIN ≤ 5.5 V, IOUT=1 mA | 5 |
| Input-output voltage differential (dropout) | Vdrop |  | 0.16 | 0.24 | V | IOUT=50 mA, 2.6 V ≤ VOUT(S) ≤ 3.3 V | 5 |
| Output current | IOUT | 250 |  |  | mA | VIN ≥ VOUT(S)+1.0 V | 5 |
| Output voltage temperature coefficient |  | -100 |  | 100 | ppm/℃ | VIN=VOUT(S)+1.0 V, IOUT=10 mA, -40°C ≤ Ta ≤ 85°C | 5 |
| Operating current | ISS1 |  | 2 | 3.5 | μA | VIN=VOUT(S)+1.0 V | 5 |
| Input voltage | VIN | 1.8 |  | 6 | V |  | 5 |
| Absolute maximum input voltage | VIN | -0.3 |  | 6 | V | Printed as VSS-0.3 to VSS+6 V; referenced to VSS | 3 |
| Absolute maximum output voltage | VOUT | -0.3 |  | 0.3 | V | Printed as VSS-0.3 to VIN+0.3 V; min referenced to VSS, max referenced to VIN (+0.3 V) | 3 |
| Allowable power dissipation (SOT-23-3L) | PD |  |  | 250 | mW | SOT-23-3L package | 3 |
| Operating temperature | Topr | -40 |  | 85 | °C |  | 3 |
| Storage temperature | Tstg | -40 |  | 125 | °C |  | 3 |
| Input capacitor | CIN | 1 |  |  | µF | Printed as 1.0µF or more | 4 |
| Output capacitor | CL | 0.1 |  |  | µF | Printed as 0.1µF or more (tantalum capacitor) | 4 |
| Output voltage accuracy (±2%) | VOUT(E)1 |  | 3.3 |  | V | VIN=VOUT(S)+1.0 V, IOUT=1 mA, ±2%; printed min VOUT(S)×0.98 and max VOUT(S)×1.02 (not computed); typ is VOUT(S)=3.3 V from ordering code | 5 |
| Ripple rejection | /PSRR/ |  | 40 |  | dB | VIN=VOUT(S)+1.0 V, f=1.0 kHz, Vrip=0.5 Vrms, IOUT=10 mA | 5 |
| Short-circuit current | Ishort |  | 30 |  | mA | VIN=VOUT(S)+1.5 V | 5 |
| Current limit | Ilim |  | 380 |  | mA | VIN=VOUT(S)+1.5 V | 5 |

## CAD (KiCad official)

- Symbol: `LN6206P332MR-G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files: `ln6206p332mr-g-etched.step` / `ln6206p332mr-g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ln6206p332mr-g.step` / `ln6206p332mr-g.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`ln6206p332mr-g.step`](ln6206p332mr-g.step) | 59 KB | You want the bare part, or you mark your own boards. |
| [`ln6206p332mr-g-etched.step`](ln6206p332mr-g-etched.step) | 2.6 MB | You want the part with `LN6206P332MR-G` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 628 faces against 69 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [NATLINEAR datasheet](docs/ln6206p332mr-g-datasheet.pdf) (10 pp, sha256 `9af9f8e21942579e`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ln6206p332mr-g-datasheet.pdf)