component

LN6206P302MR-G

Public Made by Adom

by adom

NATLINEAR Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ln6206p302mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ln6206p302mr-g-etched.fit.json ln6206p302mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ln6206p302mr-g-etched.glb ln6206p302mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ln6206p302mr-g-etched.step ln6206p302mr-g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ln6206p302mr-g.glb Publish 0.1.0 · Ray
ln6206p302mr-g.kicad_mod Publish 0.1.0 · Ray
ln6206p302mr-g.kicad_sym Publish 0.1.0 · Ray
ln6206p302mr-g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ln6206p302mr-g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ln6206p302mr-g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ln6206p302mr-g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LN6206P302MR-G

NATLINEAR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

LN6206P302MR-G from NATLINEAR, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground / negative supply reference. Common return for the input capacitor, output capacitor and load.
2 VOUT power_out Regulated output voltage (3.0 V, ±2%). Delivers up to 250 mA when V_IN >= V_OUT + 1 V. Requires an output capacitor >= 0.1 µF (tantalum) or 1 µF ceramic for stability.
3 VIN power_in Unregulated supply input. Operating range 1.8 V to 6.0 V (absolute max V_SS+6 V). Requires an input capacitor >= 1.0 µF. Dropout is typically 160 mV at I_OUT = 50 mA for the 3.0 V variant.

Key specifications

Parameter Value
Manufacturer NATLINEAR
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • LN6206P302MR-GM
  • LN6206P302MR-GV
  • LN6206P302MR-GP

CAD (KiCad official)

  • Symbol: LN6206P302MR-G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ln6206p302mr-g-etched.step / ln6206p302mr-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ln6206p302mr-g.step / ln6206p302mr-g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ln6206p302mr-g.step 59 KB You want the bare part, or you mark your own boards.
ln6206p302mr-g-etched.step 2.6 MB You want the part with LN6206P302MR-G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 622 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NATLINEAR datasheet (10 pp, sha256 9af9f8e21942579e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF