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Contents

README

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LN4501LT1G

LRC · MOSFETs · SOT-23

LN4501LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal; gate-to-source voltage is rated ±12 V (VGS), with VGS(TH) of 0.6 V to 1.2 V at VDS = VGS and ID = 250 µA.
2 S passive Source terminal; continuous source current (body diode) is rated 1.6 A and the forward diode voltage VSD is 0.8 V to 1.2 V at VGS = 0 V, ISD = 1.6 A.
3 D passive Drain terminal; drain-to-source voltage is rated 20 V and continuous drain current is rated 3.2 A at steady state (TA = 25 °C).

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDSS 20 V 1
Gate-to-Source Voltage VGS -12 12 V Printed as ±12 V 1
Continuous Drain Current (Note 1), steady state ID 3.2 A TA = 25°C 1
Continuous Drain Current (Note 1), steady state ID 2.4 A TA = 85°C 1
Steady State Power Dissipation (Note 1) PD 1.25 W Steady state, surface-mounted on FR4 with 1 in sq pad 1
Pulsed Drain Current IDM 10 A tp = 10 μs 1
Continuous Source Current (Body Diode) IS 1.6 A 1
Operating and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Temperature for Soldering Purposes TL 260 °C 1/8 in from case for 10 s 1
Junction-to-Ambient (Note 1) RθJA 100 °C/W Surface-mounted on FR4 using 1 in sq pad (Cu area 1.127 in sq [1 oz]) 1
Junction-to-Ambient (Note 2) RθJA 300 °C/W Surface-mounted on FR4 using minimum recommended pad size 1
Drain-to-Source Breakdown Voltage V(BR)DSS 20 24.5 V VGS = 0 V, ID = 250 μA 2
Zero Gate Voltage Drain Current IDSS 1.5 μA VGS = 0 V, VDS = 16 V, TJ = 25°C 2
Zero Gate Voltage Drain Current IDSS 10 μA VGS = 0 V, VDS = 16 V, TJ = 85°C 2
Gate-to-Source Leakage Current IGSS -100 100 nA VDS = 0 V, VGS = ±12 V 2
Gate Threshold Voltage VGS(TH) 0.6 1.2 V VGS = VDS, ID = 250 μA 2
Drain-to-Source On Resistance RDS(on) 70 80 mΩ VGS = 4.5 V, ID = 3.6 A 2
Drain-to-Source On Resistance RDS(on) 85 105 mΩ VGS = 2.5 V, ID = 3.1 A 2
Total Gate Charge QG(TOT) 2.4 6 nC VGS = 4.5 V, VDS = 10 V, ID = 3.6 A 2
Forward Diode Voltage VSD 0.8 1.2 V VGS = 0 V, ISD = 1.6 A 2

CAD (KiCad official)

  • Symbol: LN4501LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ln4501lt1g-etched.step / ln4501lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ln4501lt1g.step / ln4501lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (4 pp, sha256 d1262c0bf53520e1, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF