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LMX2595RHAR

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TI Clock Generators, PLLs, Frequency Synthesizers, VQFN-40(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded peripheral icslmx2595rharfactory-2.0.0extractor-text

Verified LMX2595RHAR

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 41 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LMX2595RHAR · VQFN-40(6x6) · 41 pins
  • ✓copper: 41 copper pads, none touching another net
  • ✓datasheet: all 41 pin names found in the 79-page datasheet
  • ✓distributor: lcsc C5215036, digikey LMX2595RHAR-ND, mouser 595-LMX2595RHAR
  • ✓family: QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-qhjis3by/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 41 pins = 41 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 41 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lmx2595rhar.kicad_sym✓ lmx2595rhar.kicad_mod✓ lmx2595rhar.step
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LMX2595RHAR

TI · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40(6x6)

LMX2595RHAR from TI, in a VQFN-40(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE input Chip enable input; active HIGH powers on the device.
2 GND power_in VCO ground.
3 VbiasVCO passive Bypass VCO bias; requires a 10-µF capacitor connected to VCO ground, placed close to the pin.
4 GND power_in VCO ground.
5 SYNC input Phase synchronization pin with a programmable threshold.
6 GND power_in Digital ground.
7 VccDIG power_in Digital supply; TI recommends bypassing with a decoupling capacitor to digital ground.
8 OSCinP input Reference input clock (+); high-impedance self-biasing pin that requires an AC-coupling capacitor (0.1 µF recommended).
9 OSCinM input Reference input clock (-); high-impedance self-biasing pin that requires an AC-coupling capacitor (0.1 µF recommended).
10 VregIN passive Input reference path regulator output; requires a 1-µF capacitor connected to ground, placed close to the pin.
11 VccCP power_in Charge pump supply; TI recommends bypassing with a decoupling capacitor to charge pump ground.
12 CPout output Charge pump output; TI recommends connecting C1 of the loop filter close to the pin.
13 GND power_in Charge pump ground.
14 GND power_in Digital ground.
15 VccMASH power_in Digital supply; TI recommends bypassing with a decoupling capacitor to digital ground.
16 SCK input SPI clock; high-impedance CMOS input with 1.8-V to 3.3-V logic.
17 SDI input SPI data; high-impedance CMOS input with 1.8-V to 3.3-V logic.
18 RFoutBM output Differential output B (-); requires a typically 50-Ω pullup to Vcc placed as close to the pin as possible, and can be used as an output or SYSREF output.
19 RFoutBP output Differential output B (+); requires a typically 50-Ω pullup to Vcc placed as close to the pin as possible, and can be used as an output or SYSREF output.
20 MUXout output Multiplexed output for lock detect, readback, diagnostics, and ramp status.
21 VccBUF power_in Output buffer supply; TI recommends bypassing with a decoupling capacitor to RFout ground.
22 RFoutAM output Differential output A (-); requires a 50-Ω pullup to Vcc placed as close to the pin as possible.
23 RFoutAP output Differential output A (+); requires a 50-Ω pullup to Vcc placed as close to the pin as possible.
24 CSB input SPI latch (chip select bar); high-impedance CMOS input with 1.8-V to 3.3-V logic.
25 GND power_in VCO ground.
26 VccVCO2 power_in VCO supply; TI recommends bypassing with a decoupling capacitor to VCO ground.
27 VbiasVCO2 passive Bypass VCO bias; requires a 1-µF capacitor connected to VCO ground.
28 SysRefReq input SYSREF request input for JESD204B support.
29 VrefVCO2 passive Bypass VCO supply reference; requires a 10-µF capacitor connected to VCO ground.
30 RampClk input Ramping-mode input that clocks the ramp in manual ramping mode or acts as a trigger input.
31 GND power_in VCO ground.
32 RampDir input Ramping-mode input that changes ramp direction in manual ramping mode or acts as a trigger input.
33 VbiasVARAC passive VCO varactor bias; requires a 10-µF capacitor connected to VCO ground.
34 GND power_in VCO ground.
35 Vtune input VCO tuning voltage input.
36 VrefVCO passive Bypass VCO supply reference; requires a 10-µF capacitor connected to VCO ground.
37 VccVCO power_in VCO supply; recommend bypassing with a decoupling capacitor to ground.
38 VregVCO passive VCO regulator node; requires a 1-µF capacitor connected to ground.
39 GND power_in VCO ground.
40 GND power_in VCO ground.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer TI
Package VQFN-40(6x6)
Category Embedded Peripheral ICs
Pins 41

CAD (KiCad official)

  • Symbol: LMX2595RHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40(6x6) (KiCad packages3D, STEP)
  • 3D model files: lmx2595rhar-etched.step / lmx2595rhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmx2595rhar.step / lmx2595rhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TI datasheet (79 pp, sha256 b45795f4f33ad814, retrieved 2026-10-30, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF