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LMX2592RHAR

Public Made by Adom

by adom

Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMX2592RHAR

Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40-EP(6x6)

LMX2592RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE input Chip enable input; active high powers on the device.
2 GND power_in Ground connection for VCO.
3 VbiasVCO output VCO bias internal voltage access; requires 10-µF bypass capacitor to VCO ground, place close to pin.
4 GND power_in Ground connection for VCO.
5 NC unconnected Not connected.
6 GND power_in Ground connection for VCO.
7 VCCDIG power_in Digital supply; recommend 0.1-µF bypass capacitor to digital ground.
8 OSCinP input Differential reference input clock (+); high input impedance, requires 0.1-µF series capacitor.
9 OSCinM input Differential reference input clock (-); high input impedance, requires 0.1-µF series capacitor.
10 VregIN output Input reference path internal voltage access; requires 1-µF bypass capacitor to ground, place close to pin.
11 VCCCP power_in Charge pump supply; recommend 0.1-µF bypass capacitor to charge pump ground.
12 CPout output Charge pump output; recommend connecting C1 of loop filter close to pin.
13 GND power_in Ground connection for VCO.
14 GND power_in Ground connection for VCO.
15 VCCMASH power_in Digital supply for MASH modulator; recommend 0.1-µF and 10-µF bypass capacitors to digital ground.
16 SCK input SPI or uWire clock; high impedance CMOS input, 1.8 to 3.3-V logic.
17 SDI input SPI or uWire data; high impedance CMOS input, 1.8 to 3.3-V logic.
18 RFoutBM output Differential output B (-); requires pullup component (50-Ω resistor or inductor), place close to output.
19 RFoutBP output Differential output B (+); requires pullup component (50-Ω resistor or inductor), place close to output.
20 MUXout output Programmable output; can readback SDO or lock detect indicator (active high).
21 VCCBUF power_in Output buffer supply; recommend 0.1-µF bypass capacitor to RF output ground.
22 RFoutAM output Differential output A (-); requires pullup component (50-Ω resistor or inductor), place close to output.
23 RFoutAP output Differential output A (+); requires pullup component (50-Ω resistor or inductor), place close to output.
24 CSB input SPI chip select bar or uWire latch enable; high impedance CMOS input, 1.8 to 3.3-V logic.
25 GND power_in Ground connection for VCO.
26 VCCVCO2 power_in VCO supply for second VCO core; recommend 0.1-µF and 10-µF bypass capacitors to VCO ground.
27 VbiasVCO2 output VCO bias internal voltage access for second VCO core; requires 1-µF bypass capacitor to VCO ground.
28 NC unconnected Not connected.
29 VrefVCO2 output VCO supply internal voltage access for second VCO core; requires 10-µF bypass capacitor to VCO ground.
30 NC unconnected Not connected.
31 GND power_in Ground connection for VCO.
32 NC unconnected Not connected.
33 VbiasVARAC output VCO varactor internal voltage access; requires 10-µF bypass capacitor to VCO ground.
34 GND power_in Ground connection for VCO.
35 Vtune input VCO tuning voltage input; keep away from noise sources, connect 3.3-nF or larger bypass capacitor to VCO ground.
36 VrefVCO output VCO supply internal voltage access; requires 10-µF bypass capacitor to ground.
37 VCCVCO power_in VCO supply; recommend 0.1-µF and 10-µF bypass capacitors to ground.
38 VregVCO output VCO supply internal voltage access; requires 1-µF bypass capacitor to ground.
39 GND power_in Ground connection for VCO.
40 GND power_in Ground connection for VCO.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40-EP(6x6)
Category Clock/Timing
Pins 41

CAD (KiCad official)

  • Symbol: LMX2592RHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: lmx2592rhar-etched.step / lmx2592rhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmx2592rhar.step / lmx2592rhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 64641b5469e12127, retrieved 2026-10-03, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF