component
LMX2582RHAR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LMX2582RHAR
Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40-EP(6x6)
LMX2582RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CE | input | Chip Enable input, active high powers on the device. |
| 2 | GND | power_in | Ground. |
| 3 | VbiasVCO | passive | VCO bias internal voltage access for bypass, requires 10-µF capacitor to VCO ground, place close to pin. |
| 4 | GND | power_in | Ground. |
| 5 | NC | unconnected | Not connected. |
| 6 | GND | power_in | Ground. |
| 7 | VCCDIG | power_in | Digital supply, 0.1-µF capacitor to digital ground recommended. |
| 8 | OSCinP | input | Differential reference input clock (+), high input impedance, 0.1-µF series capacitor required. |
| 9 | OSCinM | input | Differential reference input clock (-), high input impedance, 0.1-µF series capacitor required. |
| 10 | VregIN | passive | Input reference path internal voltage access for bypass, 1-µF capacitor to ground required, place close to pin. |
| 11 | VCCCP | power_in | Charge pump supply, 0.1-µF capacitor to charge pump ground recommended. |
| 12 | CPout | output | Charge pump output, recommend connecting C1 of loop filter close to pin. |
| 13 | GND | power_in | Ground. |
| 14 | GND | power_in | Ground. |
| 15 | VCCMASH | power_in | Digital supply, 0.1-µF and 10-µF capacitor to digital ground recommended. |
| 16 | SCK | input | SPI or uWire clock, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 17 | SDI | input | SPI or uWire data input, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 18 | RFoutBM | output | Differential output B (-), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 19 | RFoutBP | output | Differential output B (+), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 20 | MUXout | output | Programmable output for readback SDO or lock detect indicator (active high). |
| 21 | VCCBUF | power_in | Output buffer supply, 0.1-µF capacitor to RFout ground required. |
| 22 | RFoutAM | output | Differential output A (-), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 23 | RFoutAP | output | Differential output A (+), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 24 | CSB | input | SPI chip select bar or uWire latch enable, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 25 | GND | power_in | Ground. |
| 26 | VCCVCO2 | power_in | VCO supply, 0.1-µF and 10-µF capacitor to VCO ground recommended. |
| 27 | VbiasVCO2 | passive | VCO bias internal voltage access for bypass, 1-µF capacitor to VCO ground required. |
| 28 | NC | unconnected | Not connected. |
| 29 | VrefVCO2 | passive | VCO supply internal voltage access for bypass, 10-µF capacitor to VCO ground required. |
| 30 | NC | unconnected | Not connected. |
| 31 | GND | power_in | Ground. |
| 32 | NC | unconnected | Not connected. |
| 33 | VbiasVARAC | passive | VCO varactor internal voltage access for bypass, 10-µF capacitor to VCO ground required. |
| 34 | GND | power_in | Ground. |
| 35 | Vtune | input | VCO tuning voltage input kept away from noise sources, 3.3-nF or more capacitor to VCO ground required. |
| 36 | VrefVCO | passive | VCO supply internal voltage access for bypass, 10-µF capacitor to ground required. |
| 37 | VCCVCO | power_in | VCO supply, 0.1-µF and 10-µF capacitor to ground recommended. |
| 38 | VregVCO | passive | VCO supply internal voltage access for bypass, 1-µF capacitor to ground required. |
| 39 | GND | power_in | Ground. |
| 40 | GND | power_in | Ground. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Clock/Timing |
| Pins | 41 |
CAD (KiCad official)
- Symbol:
LMX2582RHAR - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
lmx2582rhar-etched.step/lmx2582rhar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmx2582rhar.step/lmx2582rhar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
c858357c81b73eac, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LMX2582RHAR
**Texas Instruments** · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40-EP(6x6)
LMX2582RHAR from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CE | input | Chip Enable input, active high powers on the device. |
| 2 | GND | power_in | Ground. |
| 3 | VbiasVCO | passive | VCO bias internal voltage access for bypass, requires 10-µF capacitor to VCO ground, place close to pin. |
| 4 | GND | power_in | Ground. |
| 5 | NC | unconnected | Not connected. |
| 6 | GND | power_in | Ground. |
| 7 | VCCDIG | power_in | Digital supply, 0.1-µF capacitor to digital ground recommended. |
| 8 | OSCinP | input | Differential reference input clock (+), high input impedance, 0.1-µF series capacitor required. |
| 9 | OSCinM | input | Differential reference input clock (-), high input impedance, 0.1-µF series capacitor required. |
| 10 | VregIN | passive | Input reference path internal voltage access for bypass, 1-µF capacitor to ground required, place close to pin. |
| 11 | VCCCP | power_in | Charge pump supply, 0.1-µF capacitor to charge pump ground recommended. |
| 12 | CPout | output | Charge pump output, recommend connecting C1 of loop filter close to pin. |
| 13 | GND | power_in | Ground. |
| 14 | GND | power_in | Ground. |
| 15 | VCCMASH | power_in | Digital supply, 0.1-µF and 10-µF capacitor to digital ground recommended. |
| 16 | SCK | input | SPI or uWire clock, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 17 | SDI | input | SPI or uWire data input, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 18 | RFoutBM | output | Differential output B (-), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 19 | RFoutBP | output | Differential output B (+), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 20 | MUXout | output | Programmable output for readback SDO or lock detect indicator (active high). |
| 21 | VCCBUF | power_in | Output buffer supply, 0.1-µF capacitor to RFout ground required. |
| 22 | RFoutAM | output | Differential output A (-), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 23 | RFoutAP | output | Differential output A (+), requires pullup component (50-Ω resistor or inductor), place close to output. |
| 24 | CSB | input | SPI chip select bar or uWire latch enable, high impedance CMOS input, 1.8 to 3.3-V logic. |
| 25 | GND | power_in | Ground. |
| 26 | VCCVCO2 | power_in | VCO supply, 0.1-µF and 10-µF capacitor to VCO ground recommended. |
| 27 | VbiasVCO2 | passive | VCO bias internal voltage access for bypass, 1-µF capacitor to VCO ground required. |
| 28 | NC | unconnected | Not connected. |
| 29 | VrefVCO2 | passive | VCO supply internal voltage access for bypass, 10-µF capacitor to VCO ground required. |
| 30 | NC | unconnected | Not connected. |
| 31 | GND | power_in | Ground. |
| 32 | NC | unconnected | Not connected. |
| 33 | VbiasVARAC | passive | VCO varactor internal voltage access for bypass, 10-µF capacitor to VCO ground required. |
| 34 | GND | power_in | Ground. |
| 35 | Vtune | input | VCO tuning voltage input kept away from noise sources, 3.3-nF or more capacitor to VCO ground required. |
| 36 | VrefVCO | passive | VCO supply internal voltage access for bypass, 10-µF capacitor to ground required. |
| 37 | VCCVCO | power_in | VCO supply, 0.1-µF and 10-µF capacitor to ground recommended. |
| 38 | VregVCO | passive | VCO supply internal voltage access for bypass, 1-µF capacitor to ground required. |
| 39 | GND | power_in | Ground. |
| 40 | GND | power_in | Ground. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-40-EP(6x6) |
| Category | Clock/Timing |
| Pins | 41 |
## CAD (KiCad official)
- Symbol: `LMX2582RHAR`
- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`
- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
- 3D model files: `lmx2582rhar-etched.step` / `lmx2582rhar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmx2582rhar.step` / `lmx2582rhar.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmx2582) (48 pp, sha256 `c858357c81b73eac`, retrieved 2026-10-03, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lmx2582rhar-datasheet.pdf)