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LMX2572RHAT

Texas Instruments · Clock Generators, PLLs, Frequency Synthesizers · VQFN-40-EP(6x6)

LMX2572RHAT from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CE	input	Chip enable. High impedance CMOS input. 1.8-V to 3.3-V logic. Active HIGH powers on the device.
2	GND	power_in	VCO ground.
3	VbiasVCO	input	VCO bias. Connect a 470-nF (X7R) decoupling capacitor to VCO ground as close to this pin as possible.
4	GND	power_in	VCO ground.
5	SYNC	input	Phase synchronization trigger. Configurable to accept CMOS input (1.8-V to 3.3-V logic) or differential input.
6	GND	power_in	Digital ground.
7	VccDIG	power_in	Digital power supply. Connect a 0.1-µF decoupling capacitor to digital ground.
8	OSCinP	input	Reference input clock (+). High impedance self-biasing pin. Requires AC-coupling.
9	OSCinM	input	Reference input clock (-). High impedance self-biasing pin. Requires AC-coupling.
10	VregIN	input	Input reference path regulator output. Connect a 1-µF decoupling capacitor to RF ground as close to this pin as possible.
11	VccCP	power_in	Supply for charge pump. Connect a 0.1-µF decoupling capacitor to charge pump ground.
12	CPout	output	Charge pump output. Place C1 of loop filter close to this pin.
13	GND	power_in	Charge pump ground.
14	GND	power_in	Digital ground.
15	VccMASH	power_in	Digital power supply. Connect a 1-µF decoupling capacitor to digital ground.
16	SCK	input	SPI clock. High impedance CMOS input. 1.8-V to 3.3-V logic.
17	SDI	input	SPI data. High impedance CMOS input. 1.8-V to 3.3-V logic.
18	RFoutBM	output	Differential output B (-). Low impedance output. Requires AC-coupling. Configurable between RF output or SYSREF output.
19	RFoutBP	output	Differential output B (+). Low impedance output. Requires AC-coupling. Configurable between RF output or SYSREF output.
20	MUXout	output	Multiplexed output pin. Configurable between lock detect and register readback.
21	VccBUF	power_in	Supply for output buffers. Connect a 0.1-µF decoupling capacitor to RF ground.
22	RFoutAM	output	Differential output A (-). Low impedance output. Requires AC-coupling.
23	RFoutAP	output	Differential output A (+). Low impedance output. Requires AC-coupling.
24	CSB	input	SPI latch. High impedance CMOS input. 1.8-V to 3.3-V logic.
25	GND	power_in	VCO ground.
26	VccVCO2	power_in	Supply for VCO. Connect a 1-µF decoupling capacitor to VCO ground.
27	VbiasVCO2	input	VCO bias. Connect a 100-nF (X7R) decoupling capacitor to VCO ground.
28	SysRefReq	input	SYSREF request for JESD204B support. Configurable to accept CMOS input (1.8-V to 3.3-V logic) or differential input.
29	VrefVCO2	input	VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground.
30	RampClk	input	Ramp trigger in automatic ramping mode or ramp clock in manual ramping mode. High impedance CMOS input. 1.8-V to 3.3-V logic.
31	GND	power_in	VCO ground.
32	RampDir	input	Ramp trigger in automatic ramping mode or ramp segment selection in manual ramping mode. High impedance CMOS input. 1.8-V to 3.3-V logic.
33	VbiasVARAC	input	VCO Varactor bias. Connect a 10-µF decoupling capacitor to VCO ground.
34	GND	power_in	VCO ground.
35	Vtune	input	VCO tuning voltage input. Connect a 1.5-nF or more capacitor to VCO ground.
36	VrefVCO	input	VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground.
37	VccVCO	power_in	Supply for VCO. Connect a 1-µF decoupling capacitor to VCO ground.
38	VregVCO	input	VCO regulator node. Connect a 10-nF decoupling capacitor to VCO ground.
39	GND	power_in	VCO ground.
40	GND	power_in	Digital ground.
41	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-40-EP(6x6)
Category	Clock/Timing
Pins	41

CAD (KiCad official)

Symbol: LMX2572RHAT
Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)
3D model files: lmx2572rhat-etched.step / lmx2572rhat-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmx2572rhat.step / lmx2572rhat.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (96 pp, sha256 b72fd5e826100d9b, retrieved 2026-10-05, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF