component
LMX2572LPRHAT
Public Made by Adomby adom
Texas Instruments Clock Generators / Frequency Synthesizers / PLL, HVQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "lmx2572lprhat",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Clock Generators / Frequency Synthesizers / PLL, HVQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"rtc-clock chip",
"lmx2572lprhat",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"lmx2572lprhat.kicad_sym",
"lmx2572lprhat.kicad_mod",
"lmx2572lprhat.glb",
"lmx2572lprhat.step",
"lmx2572lprhat.lbr",
"docs/hero.png",
"docs/lmx2572lprhat-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"lmx2572lprhat-hero.glb",
"lmx2572lprhat-hero.overlay.json"
],
"component": {
"mpn": "LMX2572LPRHAT",
"manufacturer": "Texas Instruments",
"package": "HVQFN-40-EP(6x6)",
"pin_count": 41,
"category": "RTC/Clock Chip",
"subcategory": "Clock Generators / Frequency Synthesizers / PLL",
"datasheet": "https://www.ti.com/cn/lit/gpn/lmx2572lp",
"parts": {
"symbol": "lmx2572lprhat.kicad_sym",
"footprint": "lmx2572lprhat.kicad_mod",
"model_3d": "lmx2572lprhat-hero.glb",
"model_3d_plain": "lmx2572lprhat.glb",
"model_3d_step": "lmx2572lprhat-etched.step",
"model_3d_step_plain": "lmx2572lprhat.step",
"lbr": "lmx2572lprhat.lbr"
},
"distributor_links": {
"lcsc": "C2662636",
"digikey": "296-51375-2-ND",
"mouser": "595-LMX2572LPRHAT"
},
"distributor_check": {
"checked_at": "2026-10-08T20:06:49Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-51375-2-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "595-LMX2572LPRHAT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CE",
"type": "input",
"description": "Chip enable: high-impedance CMOS input for 1.8-V to 3.3-V logic; active HIGH powers on the device."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "3",
"name": "VbiasVCO",
"type": "passive",
"description": "Bypass VCO bias; connect a 470-nF (X7R) decoupling capacitor to VCO ground as close to this pin as possible."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "5",
"name": "SYNC",
"type": "input",
"description": "Phase synchronization trigger; configurable to accept CMOS input (1.8-V to 3.3-V logic) or differential input."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "7",
"name": "VccDIG",
"type": "power_in",
"description": "Digital power supply; connect a 0.1-µF decoupling capacitor to digital ground."
},
{
"number": "8",
"name": "OSCinP",
"type": "input",
"description": "Reference input clock (+); high-impedance self-biasing pin that requires AC-coupling."
},
{
"number": "9",
"name": "OSCinM",
"type": "input",
"description": "Reference input clock (-); high-impedance self-biasing pin that requires AC-coupling."
},
{
"number": "10",
"name": "VregIN",
"type": "passive",
"description": "Input reference path regulator output; connect a 1-µF decoupling capacitor to RF ground as close to this pin as possible."
},
{
"number": "11",
"name": "VccCP",
"type": "power_in",
"description": "Supply for charge pump; connect a 0.1-µF decoupling capacitor to charge pump ground."
},
{
"number": "12",
"name": "CPout",
"type": "output",
"description": "Charge pump output; place C1 of the loop filter close to this pin."
},
{
"number": "13",
"name": "GND",
"type": "power_in",
"description": "Charge pump ground."
},
{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "15",
"name": "VccMASH",
"type": "power_in",
"description": "Digital power supply; connect a 1-µF decoupling capacitor to digital ground."
},
{
"number": "16",
"name": "SCK",
"type": "input",
"description": "SPI clock: high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "17",
"name": "SDI",
"type": "input",
"description": "SPI data: high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "18",
"name": "RFoutBM",
"type": "output",
"description": "Differential output B (-): low-impedance output that requires AC-coupling."
},
{
"number": "19",
"name": "RFoutBP",
"type": "output",
"description": "Differential output B (+): low-impedance output that requires AC-coupling."
},
{
"number": "20",
"name": "MUXout",
"type": "output",
"description": "Multiplexed output configurable between lock detect and register readback."
},
{
"number": "21",
"name": "VccBUF",
"type": "power_in",
"description": "Supply for output buffers; connect a 0.1-µF decoupling capacitor to RF ground."
},
{
"number": "22",
"name": "RFoutAM",
"type": "output",
"description": "Differential output A (-): low-impedance output that requires AC-coupling."
},
{
"number": "23",
"name": "RFoutAP",
"type": "output",
"description": "Differential output A (+): low-impedance output that requires AC-coupling."
},
{
"number": "24",
"name": "CSB",
"type": "input",
"description": "SPI latch: high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "25",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "26",
"name": "VccVCO2",
"type": "power_in",
"description": "Supply for VCO; connect a 1-µF decoupling capacitor to VCO ground."
},
{
"number": "27",
"name": "VbiasVCO2",
"type": "passive",
"description": "Bypass VCO bias; connect a 100-nF (X7R) decoupling capacitor to VCO ground."
},
{
"number": "28",
"name": "SysRefReq",
"type": "input",
"description": "FSK I2S frame sync input: high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "29",
"name": "VrefVCO2",
"type": "passive",
"description": "Bypass VCO supply reference; connect a 10-µF decoupling capacitor to VCO ground."
},
{
"number": "30",
"name": "RampClk",
"type": "input",
"description": "Ramp trigger in automatic ramping mode or ramp clock in manual ramping mode; can also serve as FSK I2S clock input; high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "31",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "32",
"name": "RampDir",
"type": "input",
"description": "Ramp trigger in automatic ramping mode or ramp segment selection in manual ramping mode; can also serve as FSK I2S data input; high-impedance CMOS input for 1.8-V to 3.3-V logic."
},
{
"number": "33",
"name": "VbiasVARAC",
"type": "passive",
"description": "Bypass VCO varactor bias; connect a 10-µF decoupling capacitor to VCO ground."
},
{
"number": "34",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "35",
"name": "Vtune",
"type": "input",
"description": "VCO tuning voltage input; connect a 1.5-nF or larger capacitor to VCO ground (see External Loop Filter)."
},
{
"number": "36",
"name": "VrefVCO",
"type": "passive",
"description": "Bypass VCO supply reference; connect a 10-µF decoupling capacitor to VCO ground."
},
{
"number": "37",
"name": "VccVCO",
"type": "power_in",
"description": "Supply for VCO; connect a 1-µF decoupling capacitor to VCO ground."
},
{
"number": "38",
"name": "VregVCO",
"type": "passive",
"description": "Bypass VCO regulator node; connect a 10-nF decoupling capacitor to VCO ground."
},
{
"number": "39",
"name": "GND",
"type": "power_in",
"description": "VCO ground."
},
{
"number": "40",
"name": "GND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "41",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Package name mismatch: the requested hint is HVQFN-40-EP(6x6), while the datasheet and ordering adde; The exposed die pad (DAP) has no printed pin number in the datasheet (listed as '—'). It is included; Pin types for bypass/decoupling and regulator-node pins (VbiasVCO, VbiasVCO2, VbiasVARAC, VrefVCO, V",
"exposed pad 41 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 11,
"cost_usd": 0.1036,
"at": "2026-10-08T20:05:57"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lmx2572lp",
"pages": 87,
"sha256": "69f0bb4362d891e6",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 41,
"described": 41,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "lmx2572lprhat.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "fd098c9be49cbb87441f4e4e025c27ec4faf99e55b57717c22b6e489282c72c2",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "lmx2572lprhat-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7dbdd7b8394f3006118cf265792afa26a64bf3b203df714caedb35a370a5f0d2",
"checked": "2026-10-08",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}