LMX2430TMX

{
  "slug": "lmx2430tmx",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock-timing",
    "lmx2430tmx",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
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    "README.md",
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    "lmx2430tmx.kicad_mod",
    "lmx2430tmx.glb",
    "lmx2430tmx.step",
    "lmx2430tmx.lbr",
    "docs/hero.png",
    "docs/lmx2430tmx-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lmx2430tmx-hero.glb",
    "lmx2430tmx-hero.overlay.json"
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  "component": {
    "mpn": "LMX2430TMX",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Clock/Timing",
    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/lmx2430",
    "parts": {
      "symbol": "lmx2430tmx.kicad_sym",
      "footprint": "lmx2430tmx.kicad_mod",
      "model_3d": "lmx2430tmx-hero.glb",
      "model_3d_plain": "lmx2430tmx.glb",
      "model_3d_step": "lmx2430tmx-etched.step",
      "model_3d_step_plain": "lmx2430tmx.step",
      "lbr": "lmx2430tmx.lbr"
    },
    "distributor_links": {
      "lcsc": "C2863665",
      "digikey": "LMX2430TMX-ND",
      "mouser": "926-LMX2430TMX"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T23:18:59Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "LMX2430TMX-ND",
        "status": "found",
        "lifecycle": "Obsolete"
      },
      "mouser": {
        "pn": "926-LMX2430TMX",
        "status": "found",
        "lifecycle": "Obsolete"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply bias for the RF PLL analog circuits; Vcc may range from 2.25 V to 2.75 V, and bypass capacitors must be placed as close as possible to this pin and connected directly to the ground plane."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the IF PLL analog and digital circuits, MICROWIRE, Ftest/LD and oscillator circuits."
      },
      {
        "number": "3",
        "name": "FinIF",
        "type": "input",
        "description": "IF PLL prescaler input, a small-signal input from the VCO."
      },
      {
        "number": "4",
        "name": "EN",
        "type": "input",
        "description": "Chip enable: HIGH powers up the RF and IF PLLs with power-down then controlled through MICROWIRE; LOW asynchronously powers down the device and forces the charge-pump outputs to a high-impedance (tri-state) state."
      },
      {
        "number": "5",
        "name": "CPoutIF",
        "type": "output",
        "description": "IF PLL charge-pump output, connected to the external loop filter that drives the input of the IF VCO."
      },
      {
        "number": "6",
        "name": "ENosc",
        "type": "input",
        "description": "Oscillator enable: HIGH keeps the oscillator buffer powered up independent of EN; LOW configures OSCout/FLoutIF as the IF fastlock output."
      },
      {
        "number": "7",
        "name": "OSCout/FLoutIF",
        "type": "output",
        "description": "Oscillator output for an external crystal when ENosc is HIGH, or IF PLL fastlock output (also a general-purpose CMOS tri-state output) when ENosc is LOW, connecting a resistor in parallel to R2 of the external loop filter."
      },
      {
        "number": "8",
        "name": "OSCin",
        "type": "input",
        "description": "Reference oscillator input with an approximate Vcc/2 threshold, driven by an external AC-coupled source."
      },
      {
        "number": "9",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply bias for the RF PLL analog circuits; Vcc may range from 2.25 V to 2.75 V, and bypass capacitors must be placed as close as possible to this pin and connected directly to the ground plane."
      },
      {
        "number": "10",
        "name": "Ftest/LD",
        "type": "output",
        "description": "Programmable multiplexed output that functions as a general-purpose CMOS tri-state output, N and R divider output, RF/IF PLL push-pull or open-drain analog lock-detect output, or RF/IF PLL digital filtered lock-detect output."
      },
      {
        "number": "11",
        "name": "FLoutRF",
        "type": "output",
        "description": "RF PLL fastlock output connecting a resistor in parallel to R2 of the external loop filter, which can also function as a general-purpose CMOS tri-state output."
      },
      {
        "number": "12",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the IF PLL analog and digital circuits, MICROWIRE, Ftest/LD and oscillator circuits."
      },
      {
        "number": "13",
        "name": "CPoutRF",
        "type": "output",
        "description": "RF PLL charge-pump output, connected to the external loop filter that drives the input of the RF VCO."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground for the IF PLL analog and digital circuits, MICROWIRE, Ftest/LD and oscillator circuits."
      },
      {
        "number": "15",
        "name": "FinRF",
        "type": "input",
        "description": "RF PLL prescaler input, a small-signal input from the VCO."
      },
      {
        "number": "16",
        "name": "FinRF*",
        "type": "input",
        "description": "RF PLL prescaler complementary input; for single-ended operation it must be AC grounded through a 100-pF capacitor, and the device can be driven differentially when that AC-coupling capacitor is omitted."
      },
      {
        "number": "17",
        "name": "VCC",
        "type": "power_in",
        "description": "Power supply bias for the RF PLL analog circuits; Vcc may range from 2.25 V to 2.75 V, and bypass capacitors must be placed as close as possible to this pin and connected directly to the ground plane."
      },
      {
        "number": "18",
        "name": "LE",
        "type": "input",
        "description": "MICROWIRE latch enable, high-impedance CMOS input; when LE transitions HIGH, data in the shift register is loaded into one of 6 internal control registers."
      },
      {
        "number": "19",
        "name": "CLK",
        "type": "input",
        "description": "MICROWIRE clock input, high-impedance CMOS; DATA is clocked into the 24-bit shift register on the rising edge of CLK."
      },
      {
        "number": "20",
        "name": "DATA",
        "type": "input",
        "description": "MICROWIRE data input, high-impedance CMOS; binary serial data with the MSB shifted in first and the two last bits being the control bits."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet text (pages 3-4) is a wrapped two-column table. The TSSOP pin numbers for the supply a; The datasheet gives one shared description for all GND pins and one shared description for all VCC p; The pin 1 footnote in the functional block diagram note says pin 1 applies to ULGA and pin 2 to TSSO"
        ],
        "pages_sent": 9,
        "cost_usd": 0.076,
        "at": "2026-10-08T23:18:41"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/lmx2430",
        "pages": 56,
        "sha256": "e729234c7e638f2b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
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        "checked": "2026-10-08",
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      {
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        "sha256": "12650be678847f5a5c07b9f83e1c1bfe455a5b60d8cc8071598f020f3786d33b",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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  }
}