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LMV722MX

Public Made by Adom

by adom

Texas Instruments Operational Amplifier, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierslmv722mxfactory-2.0.0extractor-text

Verified LMV722MX

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LMV722MX · SOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 33-page datasheet
  • ✓distributor: lcsc C781804, digikey LMV722MXTR-ND, mouser 926-LMV722MX
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-sw9h77q3/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.24)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lmv722mx.kicad_sym✓ lmv722mx.kicad_mod✓ lmv722mx.step
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Symbol & Footprint

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Contents

README

markdown

LMV722MX

Texas Instruments · Operational Amplifier · SOP-8

LMV722MX from Texas Instruments, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Amplifier A output with rail-to-rail swing, within 120mV of either rail at 600Ω load at 2.2V supply.
2 -IN A input Amplifier A inverting input; keep input voltage no more than 0.3V below V-.
3 +IN A input Amplifier A non-inverting input; common-mode range includes ground.
4 V- power_in Negative supply or ground; total supply (V+ - V-) is 2.2V to 5.5V operating, 6V absolute maximum.
5 +IN B input Amplifier B non-inverting input; common-mode range includes ground.
6 -IN B input Amplifier B inverting input; keep input voltage no more than 0.3V below V-.
7 OUT B output Amplifier B output with rail-to-rail swing, within 120mV of either rail at 600Ω load at 2.2V supply.
8 V+ power_in Positive supply; operating range 2.2V to 5.5V, 6V absolute maximum between V+ and V-.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOP-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
ESD Tolerance Human Body Model 2000 V 1.5 kΩ in series with 100 pF 2
ESD Tolerance Machine Model 100 V 200Ω in series with 100 pF 2
Supply Voltage (V+, V−) 6 V 2
Soldering Information 235 °C Infrared or Convection (20 sec.) 2
Storage Temp. Range -65 150 °C 2
Junction Temperature TJ 150 °C 2
Supply Voltage 2.2 5.5 V 2
Temperature Range TJ -40 85 °C 2
Thermal Resistance SOIC 8-pin θJA 190 °C/W SOIC package, 8-pin Surface Mount 2
Input Offset Voltage (2.2V) VOS 0.02 3 mV V+ = 2.2V, TJ = 25°C 2
Input Offset Voltage (2.2V, temp extremes) VOS 3.5 mV V+ = 2.2V, temp extremes 2
Common Mode Rejection Ratio (2.2V) CMRR 70 88 dB 0V ≤ VCM ≤ 1.3V, TJ = 25°C 2
Common Mode Rejection Ratio (2.2V, temp extremes) CMRR 64 dB 0V ≤ VCM ≤ 1.3V, temp extremes 2
Power Supply Rejection Ratio (2.2V) PSRR 70 90 dB 2.2V ≤ V+ ≤ 5V, VO = 0 VCM = 0, TJ = 25°C 2
Power Supply Rejection Ratio (2.2V, temp extremes) PSRR 64 dB 2.2V ≤ V+ ≤ 5V, VO = 0 VCM = 0, temp extremes 2
Large Signal Voltage Gain RL=600Ω (2.2V) AV 75 81 dB RL=600Ω, VO = 0.75V to 2.00V, TJ = 25°C 2
Large Signal Voltage Gain RL=600Ω (2.2V, temp extremes) AV 60 dB RL=600Ω, VO = 0.75V to 2.00V, temp extremes 2
Large Signal Voltage Gain RL=2kΩ (2.2V) AV 75 84 dB RL= 2kΩ, VO = 0.50V to 2.10V, TJ = 25°C 2
Large Signal Voltage Gain RL=2kΩ (2.2V, temp extremes) AV 60 dB RL= 2kΩ, VO = 0.50V to 2.10V, temp extremes 2
Output Swing high RL=600Ω (2.2V) VO 2.09 2.125 V RL = 600Ω to V+/2, TJ = 25°C 3
Output Swing high RL=600Ω (2.2V, temp extremes) VO 2.065 V RL = 600Ω to V+/2, temp extremes 3
Output Swing low RL=600Ω (2.2V) VO 0.071 0.12 V RL = 600Ω to V+/2, TJ = 25°C 3
Output Swing low RL=600Ω (2.2V, temp extremes) VO 0.145 V RL = 600Ω to V+/2, temp extremes 3
Output Swing high RL=2kΩ (2.2V) VO 2.15 2.177 V RL = 2kΩ to V+/2, TJ = 25°C 3
Output Swing high RL=2kΩ (2.2V, temp extremes) VO 2.125 V RL = 2kΩ to V+/2, temp extremes 3
Output Swing low RL=2kΩ (2.2V) VO 0.056 0.08 V RL = 2kΩ to V+/2, TJ = 25°C 3
Output Swing low RL=2kΩ (2.2V, temp extremes) VO 0.105 V RL = 2kΩ to V+/2, temp extremes 3
Output Current Sourcing (2.2V) IO 10 14.9 mA Sourcing, VO = 0V, VIN(diff) = ± 0.5V, TJ = 25°C 3
Output Current Sourcing (2.2V, temp extremes) IO 5 mA Sourcing, VO = 0V, VIN(diff) = ± 0.5V, temp extremes 3
Output Current Sinking (2.2V) IO 10 17.6 mA Sinking, VO = 2.2V, VIN(diff) = ± 0.5V, TJ = 25°C 3
Output Current Sinking (2.2V, temp extremes) IO 5 mA Sinking, VO = 2.2V, VIN(diff) = ± 0.5V, temp extremes 3
Supply Current LMV722 (2.2V) IS 1.81 2.2 mA LMV722, V+ = 2.2V, TJ = 25°C 3
Supply Current LMV722 (2.2V, temp extremes) IS 2.6 mA LMV722, V+ = 2.2V, temp extremes 3
Input Offset Voltage (5V) VOS -0.08 3 mV V+ = 5V, TJ = 25°C 3
Input Offset Voltage (5V, temp extremes) VOS 3.5 mV V+ = 5V, temp extremes 3
Common Mode Rejection Ratio (5V) CMRR 70 89 dB 0V ≤ VCM ≤ 4.1V, TJ = 25°C 3
Common Mode Rejection Ratio (5V, temp extremes) CMRR 64 dB 0V ≤ VCM ≤ 4.1V, temp extremes 3
Power Supply Rejection Ratio (5V) PSRR 70 90 dB 2.2V ≤ V+ ≤ 5.0V, VO = 0 VCM = 0, TJ = 25°C 3
Power Supply Rejection Ratio (5V, temp extremes) PSRR 64 dB 2.2V ≤ V+ ≤ 5.0V, VO = 0 VCM = 0, temp extremes 3
Large Signal Voltage Gain RL=600Ω (5V) AV 80 87 dB RL = 600Ω, VO = 0.75V to 4.80V, TJ = 25°C 4
Large Signal Voltage Gain RL=600Ω (5V, temp extremes) AV 70 dB RL = 600Ω, VO = 0.75V to 4.80V, temp extremes 4
Large Signal Voltage Gain RL=2kΩ (5V) AV 85 94 dB RL = 2kΩ, VO = 0.70V to 4.90V, TJ = 25°C 4
Large Signal Voltage Gain RL=2kΩ (5V, temp extremes) AV 70 dB RL = 2kΩ, VO = 0.70V to 4.90V, temp extremes 4
Output Swing high RL=600Ω (5V) VO 4.84 4.882 V RL = 600Ω to V+/2, TJ = 25°C 4
Output Swing high RL=600Ω (5V, temp extremes) VO 4.815 V RL = 600Ω to V+/2, temp extremes 4
Output Swing low RL=600Ω (5V) VO 0.134 0.19 V RL = 600Ω to V+/2, TJ = 25°C 4
Output Swing low RL=600Ω (5V, temp extremes) VO 0.215 V RL = 600Ω to V+/2, temp extremes 4
Output Swing high RL=2kΩ (5V) VO 4.93 4.952 V RL = 2kΩ to V+/2, TJ = 25°C 4
Output Swing high RL=2kΩ (5V, temp extremes) VO 4.905 V RL = 2kΩ to V+/2, temp extremes 4
Output Swing low RL=2kΩ (5V) VO 0.076 0.11 V RL = 2kΩ to V+/2, TJ = 25°C 4
Output Swing low RL=2kΩ (5V, temp extremes) VO 0.135 V RL = 2kΩ to V+/2, temp extremes 4
Output Current Sourcing (5V) IO 25 52.6 mA Sourcing, VO = 0V, VIN(diff) = ±0.5V, TJ = 25°C 4
Output Current Sourcing (5V, temp extremes) IO 12 mA Sourcing, VO = 0V, VIN(diff) = ±0.5V, temp extremes 4
Output Current Sinking (5V) IO 15 23.7 mA Sinking, VO = 5V, VIN(diff) = ±0.5V, TJ = 25°C 4
Output Current Sinking (5V, temp extremes) IO 8.5 mA Sinking, VO = 5V, VIN(diff) = ±0.5V, temp extremes 4
Supply Current LMV722 (5V) IS 2.01 2.4 mA LMV722, V+ = 5V, TJ = 25°C 4
Supply Current LMV722 (5V, temp extremes) IS 2.8 mA LMV722, V+ = 5V, temp extremes 4

CAD (KiCad official)

  • Symbol: LMV722MX
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lmv722mx-etched.step / lmv722mx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmv722mx.step / lmv722mx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 00a935de950f28b5, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF