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LMV602DRG

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HANSCHIP semiconductor Operational Amplifier, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentop-amp-cmplmv602drg
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Contents

README

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LMV602DRG

HANSCHIP semiconductor · Operational Amplifier · SOP-8

LMV602DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Amplifier A output. Rail-to-rail output swing capable of typically 84mA source and 75mA sink current into a 10Ω load to VS/2 at 5V supply.
2 INA- input Amplifier A inverting input. High-impedance CMOS input with typical 1pA bias current. Common-mode range extends from VSS-0.1V to VDD+0.1V.
3 INA+ input Amplifier A non-inverting input. High-impedance CMOS input with typical 1pA bias current. Common-mode range extends from VSS-0.1V to VDD+0.1V.
4 VSS power_in Negative supply / ground. Single-supply operation ties to GND; dual-supply operation accepts down to -2.75V. Bypass with 0.1µF ceramic to ground in dual-supply operation.
5 INB+ input Amplifier B non-inverting input. High-impedance CMOS input with typical 1pA bias current. Common-mode range extends from VSS-0.1V to VDD+0.1V.
6 INB- input Amplifier B inverting input. High-impedance CMOS input with typical 1pA bias current. Common-mode range extends from VSS-0.1V to VDD+0.1V.
7 OUTB output Amplifier B output. Rail-to-rail output swing capable of typically 84mA source and 75mA sink current into a 10Ω load to VS/2 at 5V supply.
8 VDD power_in Positive supply. Operates from 2.1V to 5.5V single-supply (absolute max 7.5V VDD-to-VSS). Bypass with a 0.1µF ceramic capacitor placed close to this pin.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • LMV602DRG
  • LMV602DRG4
  • LMV602DRGPG
  • LMV602DRGDGKRG
  • LMV602DRGDQRG

CAD (KiCad official)

  • Symbol: LMV602DRG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: lmv602drg-etched.step / lmv602drg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmv602drg.step / lmv602drg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (11 pp, sha256 752d2ff5f0882d30, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF