# LMV324IDRG

**HANSCHIP semiconductor** · Operational Amplifier · SOP-14

LMV324IDRG from HANSCHIP semiconductor, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Output of amplifier A. |
| 2 | -INA | input | Inverting input of amplifier A. |
| 3 | +INA | input | Non-inverting input of amplifier A. |
| 4 | +Vs | power_in | Positive supply; operating range 2.1V to 5.5V, with a 0.1uF ceramic bypass capacitor placed close to the pin. |
| 5 | +INB | input | Non-inverting input of amplifier B. |
| 6 | -INB | input | Inverting input of amplifier B. |
| 7 | OUTB | output | Output of amplifier B. |
| 8 | OUTC | output | Output of amplifier C. |
| 9 | -INC | input | Inverting input of amplifier C. |
| 10 | +INC | input | Non-inverting input of amplifier C. |
| 11 | -Vs | power_in | Negative supply or ground; dual-supply operation is ±1.25V to ±2.75V. |
| 12 | +IND | input | Non-inverting input of amplifier D. |
| 13 | -IND | input | Inverting input of amplifier D. |
| 14 | OUTD | output | Output of amplifier D. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input offset voltage | VOS | -5 | 0.8 | 5 | mV | VS = +5V, 25℃ (printed as ±0.8 typ, ±5 max) | 3 |
| Common-mode rejection ratio | CMRR | 62 | 70 |  | dB | VS = 5.5V, VCM = -0.1V to 4V | 3 |
| Common-mode rejection ratio | CMRR | 56 | 68 |  | dB | VS = 5.5V, VCM = -0.1V to 5.6V | 3 |
| Open-loop voltage gain | AOL | 70 | 80 |  | dB | RL = 5KΩ, Vo = 0.1V to 4.9V | 3 |
| Open-loop voltage gain | AOL | 80 | 84 |  | dB | RL = 100KΩ, Vo = 0.035V to 4.965V | 3 |
| Output current | IOUT | 18 | 30 |  | mA |  | 3 |
| Operating voltage range |  | 2.1 |  | 5.5 | V |  | 3 |
| Power supply rejection ratio | PSRR | 60 | 80 |  | dB | Vs = +2.5 V to +5.5 V, VCM = (-VS) + 0.5V | 3 |
| Quiescent current per amplifier | IQ |  | 45 | 75 | µA | IOUT = 0 | 3 |
| Supply voltage (absolute maximum) |  |  |  | 7.5 | V | Printed as 'V+ to V-' 7.5V; single value, no min column printed | 2 |
| Storage temperature |  | -50 |  | 150 | ℃ |  | 2 |
| Junction temperature |  |  |  | 150 | ℃ |  | 2 |
| Lead temperature (soldering) |  |  |  | 245 | ℃ | 焊接 10 秒 | 2 |
| Operating temperature range |  | -40 |  | 85 | ℃ |  | 2 |

## CAD (KiCad official)

- Symbol: `LMV324IDRG`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `lmv324idrg-etched.step` / `lmv324idrg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmv324idrg.step` / `lmv324idrg.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757279681391267840) (14 pp, sha256 `89f5cafab2edefe2`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmv324idrg-datasheet.pdf)