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LMV321AIDBVRG

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HANSCHIP semiconductor Operational Amplifier, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMV321AIDBVRG

HANSCHIP semiconductor · Operational Amplifier · SOT-23-5

LMV321AIDBVRG from HANSCHIP semiconductor, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +IN input Non-inverting input with rail-to-rail common-mode range extending 100 mV beyond both supply rails and an internal RF/EMI filter.
2 -VS power_in Negative supply (ground in single-supply use); total supply VS+ to VS- operates from 1.8 V to 5.5 V and must not exceed 10 V absolute maximum.
3 -IN input Inverting input with rail-to-rail common-mode range, internal RF/EMI filter, and input current limited to ±10 mA.
4 OUT output Rail-to-rail class AB output that drives capacitive loads up to 500 pF and has continuous short-circuit protection.
5 +VS power_in Positive supply, 1.8 V to 5.5 V operating relative to -VS, 10 V absolute maximum.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOT-23-5
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage VS 1.8 5.5 V 5
Quiescent current (per amplifier) IQ 85 120 μA 5
Quiescent current (per amplifier), temperature range IQ 150 μA TA = −40 to +125 ℃ 5
Operating temperature range TA -40 125 ℃ 5
Supply voltage VS+ to VS− VS+ − VS− 10 V 3
Signal input terminal voltage VIN -0.5 0.5 V Referenced to VS− (min) and VS+ (max) 3
Signal input terminal current IIN -10 10 mA 3
Storage temperature range Tstg -65 150 ℃ 3
Junction temperature TJ 150 ℃ 3
Lead temperature range (soldering) 260 ℃ 10 s 3
ESD human body model HBM -5000 5000 V MIL-STD-883J Method 3015.9 3
ESD charged device model CDM -2000 2000 V ESDA/JEDEC JS-002-2014 3
ESD machine model MM -250 250 V JESD22-A115C 3
Input offset voltage VOS -3 0.7 3 mV VS = 5.0 V, TA = +25 ℃, VCM = VS/2, VO = VS/2, RL = 10 kΩ to VS/2 4
Offset voltage drift VOS TC 1 3.5 μV/℃ TA = −40 to +125 ℃ 4
Power supply rejection ratio PSRR 80 110 dB VS = 2.0 to 5.5 V, VCM < VS+ − 2V 4
Power supply rejection ratio, temperature range PSRR 75 dB TA = −40 to +125 ℃ 4
Input bias current IB 5 50 pA 4
Input bias current, TA −40 to +85 ℃ IB 200 pA TA = −40 to +85 ℃ 4
Input bias current, TA −40 to +125 ℃ IB 2000 pA TA = −40 to +125 ℃ 4
Input offset current IOS 10 50 pA 4
Common-mode rejection ratio CMRR 70 83 dB VS = 5.5 V, VCM = −0.1 to 5.6 V 4
Common-mode rejection ratio, temperature range CMRR 65 dB VCM = 0 to 5.3 V, TA = −40 to +125 ℃ 4
Common-mode rejection ratio at 2.0 V CMRR 65 77 dB VS = 2.0 V, VCM = −0.1 to 2.1 V 4
Common-mode rejection ratio at 2.0 V, temperature range CMRR 60 dB VCM = 0 to 1.8 V, TA = −40 to +125 ℃ 4
Common-mode voltage range VCM -0.1 0.1 V Referenced to rails: min VS− − 0.1 V, max VS+ + 0.1 V 4
Open-loop voltage gain AVOL 90 105 dB RL = 50 kΩ, VO = 0.05 to 3.5 V 4
Open-loop voltage gain, temperature range AVOL 85 dB RL = 50 kΩ, VO = 0.05 to 3.5 V, TA = −40 to +125 ℃ 4
Open-loop voltage gain, RL = 2 kΩ AVOL 85 100 dB RL = 2 kΩ, VO = 0.15 to 3.5 V 4
Open-loop voltage gain, RL = 2 kΩ, temperature range AVOL 80 dB RL = 2 kΩ, VO = 0.15 to 3.5 V, TA = −40 to +125 ℃ 4
High output voltage swing VOH -6 -3 mV RL = 50 kΩ, referenced to VS+ 5
High output voltage swing, RL = 2 kΩ VOH -100 -65 mV RL = 2 kΩ, referenced to VS+ 5
Low output voltage swing VOL 2 4 mV RL = 50 kΩ, referenced to VS− 5
Low output voltage swing, RL = 2 kΩ VOL 42 65 mV RL = 2 kΩ, referenced to VS− 5
Package thermal resistance, junction to ambient (SOT23-5L) θJA 190 ℃/W SOT23-5L 5

CAD (KiCad official)

  • Symbol: LMV321AIDBVRG
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lmv321aidbvrg-etched.step / lmv321aidbvrg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmv321aidbvrg.step / lmv321aidbvrg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (20 pp, sha256 7cd992080471df0b, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF