LMUN5335DW1T1G

{
  "slug": "lmun5335dw1t1g",
  "version": "0.1.0",
  "type": "component",
  "description": "LRC Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "transistors-thyristors",
    "lmun5335dw1t1g",
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  "dependencies": {},
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    "lmun5335dw1t1g.step",
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  "component": {
    "mpn": "LMUN5335DW1T1G",
    "manufacturer": "LRC",
    "package": "SOT-363",
    "pin_count": 6,
    "category": "Transistors/Thyristors",
    "subcategory": "Digital Transistors",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586204742984458240",
    "parts": {
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      "model_3d_step_plain": "lmun5335dw1t1g.step",
      "lbr": "lmun5335dw1t1g.lbr"
    },
    "distributor_links": {
      "lcsc": "C172431"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T04:45:54Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "EMITTER 2",
        "type": "passive",
        "description": "Emitter of transistor Q2 in the dual BRT; the base-emitter bias resistor R2 (47 kΩ for LMUN5335DW1T1G) is connected between base and emitter, and the device is rated 50 Vdc VCEO and 100 mAdc collector current."
      },
      {
        "number": "2",
        "name": "BASE 2",
        "type": "passive",
        "description": "Base of transistor Q2 with integrated series input resistor R1 (2.2 kΩ for LMUN5335DW1T1G), so it is driven directly through the internal bias network."
      },
      {
        "number": "3",
        "name": "COLLECTOR 1",
        "type": "passive",
        "description": "Collector of transistor Q1 in the dual BRT; rated 50 Vdc collector-emitter and 100 mAdc maximum collector current (absolute maximum, T A = 25°C)."
      },
      {
        "number": "4",
        "name": "EMITTER 1",
        "type": "passive",
        "description": "Emitter of transistor Q1; the base-emitter bias resistor R2 (47 kΩ for LMUN5335DW1T1G) is connected between base and emitter."
      },
      {
        "number": "5",
        "name": "BASE 1",
        "type": "passive",
        "description": "Base of transistor Q1 with integrated series input resistor R1 (2.2 kΩ for LMUN5335DW1T1G), so it is driven directly through the internal bias network."
      },
      {
        "number": "6",
        "name": "COLLECTOR 2",
        "type": "passive",
        "description": "Collector of transistor Q2 in the dual BRT; rated 50 Vdc collector-emitter and 100 mAdc maximum collector current (absolute maximum, T A = 25°C)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
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        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives the pinout only as a text list on page 29 (no pin diagram with pin numbers place; Pins are the terminals of two internal transistors with bias resistors; the datasheet defines no sup; The LMUN5335DW1T1G resistor values (R1 2.2 kΩ, R2 47 kΩ) are from the ordering table on page 2. The "
        ],
        "pages_sent": 29,
        "cost_usd": 0.1068,
        "at": "2026-10-09T04:45:00"
      },
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        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586204742984458240",
        "pages": 29,
        "sha256": "5626974ae0eb8033",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "checked": "2026-10-09",
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}