LMUN5311DW1T1G

{
  "schema_version": 1,
  "type": "component",
  "slug": "lmun5311dw1t1g",
  "title": "LMUN5311DW1T1G",
  "brief": "LRC Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "lmun5311dw1t1g",
    "factory-2.0.0",
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  "component": {
    "mpn": "LMUN5311DW1T1G",
    "manufacturer": "LRC",
    "package": "SOT-363",
    "pin_count": 6,
    "category": "Transistors/Thyristors",
    "subcategory": "Digital Transistors",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589952068623495168",
    "parts": {
      "symbol": "lmun5311dw1t1g.kicad_sym",
      "footprint": "lmun5311dw1t1g.kicad_mod",
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      "model_3d_plain": "lmun5311dw1t1g.glb",
      "model_3d_step": "lmun5311dw1t1g-etched.step",
      "model_3d_step_plain": "lmun5311dw1t1g.step",
      "lbr": "lmun5311dw1t1g.lbr"
    },
    "distributor_links": {
      "lcsc": "C2905405"
    },
    "distributor_check": {
      "checked_at": "2026-10-09T14:25:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "EMITTER 2",
        "type": "passive",
        "description": "Emitter of transistor Q2 (NPN) in the dual BRT; the device is rated for VCEO 50 Vdc and collector current 100 mAdc."
      },
      {
        "number": "2",
        "name": "BASE 2",
        "type": "passive",
        "description": "Base of transistor Q2 (NPN), which drives the integrated bias network (R1 = 10 kΩ series base resistor and R2 = 10 kΩ base-emitter resistor for LMUN5311DW1T1G)."
      },
      {
        "number": "3",
        "name": "COLLECTOR 1",
        "type": "passive",
        "description": "Collector of transistor Q1 (PNP) in the dual BRT; the device is rated for VCBO 50 Vdc and collector current 100 mAdc."
      },
      {
        "number": "4",
        "name": "EMITTER 1",
        "type": "passive",
        "description": "Emitter of transistor Q1 (PNP) in the dual BRT, with the same 50 V and 100 mA ratings as the device."
      },
      {
        "number": "5",
        "name": "BASE 1",
        "type": "passive",
        "description": "Base of transistor Q1 (PNP), which drives the integrated bias network (R1 = 10 kΩ series base resistor and R2 = 10 kΩ base-emitter resistor for LMUN5311DW1T1G)."
      },
      {
        "number": "6",
        "name": "COLLECTOR 2",
        "type": "passive",
        "description": "Collector of transistor Q2 (NPN) in the dual BRT; the device is rated for VCBO 50 Vdc and collector current 100 mAdc."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet gives the pin list as numbered labels (EMITTER 2, BASE 2, COLLECTOR 1, etc.) on page 2; Bias resistor values (10 kΩ / 10 kΩ) are taken from the ordering table on page 2 for LMUN5311DW1T1G "
        ],
        "pages_sent": 30,
        "cost_usd": 0.1115,
        "at": "2026-10-09T14:23:33"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589952068623495168",
        "pages": 30,
        "sha256": "5288369b8d8d0295",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          2,
          1.1
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "045cc95e18ee7a13d1623c3ce6604fc833049bdb4f952f68c26e3c5767d122e4",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lmun5311dw1t1g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "1802ba8cd190570f16ee7baf1778fd5b6263d7188d3cc71838e40578146406f9",
        "checked": "2026-10-09",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "LRC",
      "Package": "SOT-363",
      "Category": "Transistors/Thyristors",
      "Pins": "6"
    }
  },
  "variants": [],
  "sections": [
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    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
    "lmun5311dw1t1g"
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  "discovery_pitch": "LMUN5311DW1T1G (LRC) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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  "visibility": {
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}