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LMUN5232T1G

LRC · Digital Transistors · SC-70

LMUN5232T1G from LRC, in a SC-70. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base input of the bias resistor transistor, connected through the internal series base resistor R1 (4.7 kΩ for LMUN5232T1G).
2 EMITTER power_in Emitter is the ground reference, connected to the internal base-emitter resistor R2 (4.7 kΩ for LMUN5232T1G).
3 COLLECTOR output Collector output, rated for 50 Vdc collector-emitter voltage and 100 mAdc collector current.

Key specifications

Parameter Value
Manufacturer LRC
Package SC-70
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Cutoff Current ICBO 100 nAdc VCB = 50 V, IE = 0 3
Collector-Emitter Cutoff Current ICEO 500 nAdc VCE = 50 V, IB = 0 3
Emitter-Base Cutoff Current IEBO 1.5 mAdc VEB = 6.0 V, IC = 0 3
Collector-Base Breakdown Voltage V(BR)CBO 50 Vdc IC = 10 µA, IE = 0 3
Collector-Emitter Breakdown Voltage V(BR)CEO 50 Vdc IC = 2.0 mA, IB = 0 3
DC Current Gain hFE 15 30 VCE = 10 V, IC = 5.0 mA 3
Collector-Emitter Saturation Voltage VCE(sat) 0.25 Vdc IC = 10 mA, IB = 1 mA 3
Input Resistor R1 R1 3.3 4.7 6.1 kΩ 4
Base-Emitter Resistor R2 R2 4.7 kΩ 2
Collector-Base Voltage VCBO 50 Vdc 1
Collector-Emitter Voltage VCEO 50 Vdc 1
Collector Current IC 100 mAdc 1
Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Total Device Dissipation PD 202 mW TA = 25°C, FR-4 @ Minimum Pad 1
Total Device Dissipation PD 310 mW TA = 25°C, FR-4 @ 1.0 x 1.0 inch Pad 1
Derate above 25°C PD 1.6 mW/°C FR-4 @ Minimum Pad 1
Derate above 25°C PD 2.5 mW/°C FR-4 @ 1.0 x 1.0 inch Pad 1
Thermal Resistance Junction-to-Ambient RθJA 618 °C/W FR-4 @ Minimum Pad 1
Thermal Resistance Junction-to-Ambient RθJA 403 °C/W FR-4 @ 1.0 x 1.0 inch Pad 1
Thermal Resistance Junction-to-Lead RθJL 280 °C/W FR-4 @ Minimum Pad 1
Thermal Resistance Junction-to-Lead RθJL 332 °C/W FR-4 @ 1.0 x 1.0 inch Pad 1

CAD (KiCad official)

  • Symbol: LMUN5232T1G
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SC-70 (KiCad packages3D, STEP)
  • 3D model files: lmun5232t1g-etched.step / lmun5232t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmun5232t1g.step / lmun5232t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (10 pp, sha256 082ff06d2865d549, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF