# LMUN2211LT1G

**LRC** · Digital Transistors · SOT-23

LMUN2211LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | input | Base input of the NPN BRT, with the monolithic bias resistor network (R1 = 10 kΩ, R2 = 10 kΩ for LMUN2211LT1G) integrated between base and emitter. |
| 2 | EMITTER | power_in | Emitter, labeled GROUND in the datasheet; the datasheet gives a maximum collector current of 100 mAdc and maximum collector-emitter voltage of 50 Vdc. |
| 3 | COLLECTOR | output | Collector output of the NPN BRT, rated at a maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Base Voltage | VCBO |  |  | 50 | Vdc | TA = 25°C | 1 |
| Collector-Emitter Voltage | VCEO |  |  | 50 | Vdc | TA = 25°C | 1 |
| Collector Current | IC |  |  | 100 | mAdc | TA = 25°C | 1 |
| Total Power Dissipation | PD |  |  | 246 | mW | TA = 25°C; FR-4 board, minimum recommended footprint (Note 1) | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  |  | 508 | °C/W | Note 1 (FR-4, minimum recommended footprint) | 2 |
| Operating and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 2 |
| Maximum Temperature for Soldering Purposes | TL |  |  | 260 | °C | Time in solder bath 10 s | 2 |
| Collector-Base Breakdown Voltage | V(BR)CBO | 50 |  |  | Vdc | IC = 10 µA, IE = 0 | 2 |
| Collector-Emitter Breakdown Voltage | V(BR)CEO | 50 |  |  | Vdc | IC = 2.0 mA, IB = 0; pulse test (Note 2) | 2 |
| Collector-Base Cutoff Current | ICBO |  |  | 100 | nAdc | VCB = 50 V, IE = 0 | 2 |
| Collector-Emitter Cutoff Current | ICEO |  |  | 500 | nAdc | VCE = 50 V, IB = 0 | 2 |
| Emitter-Base Cutoff Current (LMUN2211LT1G) | IEBO |  |  | 0.5 | mAdc | VEB = 6.0 V, IC = 0 | 2 |
| DC Current Gain (LMUN2211LT1G) | hFE | 35 | 60 |  |  | VCE = 10 V, IC = 5.0 mA | 2 |
| Collector-Emitter Saturation Voltage (LMUN2211LT1G) | VCE(sat) |  |  | 0.25 | Vdc | IC = 10 mA, IB = 0.3 mA; pulse test (Note 2) | 2 |
| Output Voltage (on) (LMUN2211LT1G) | VOL |  |  | 0.2 | Vdc | VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ | 3 |
| Output Voltage (off) (LMUN2211LT1G) | VOH | 4.9 |  |  | Vdc | VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ | 3 |
| Input Resistor R1 (LMUN2211LT1G) | R1 | 7 | 10 | 13 | kΩ |  | 3 |
| Resistor Ratio R1/R2 (LMUN2211LT1G) | R1/R2 | 0.8 | 1 | 1.2 |  |  | 3 |
| Input Resistor R2 (LMUN2211LT1G nominal, from device marking table) | R2 |  | 10 |  | kΩ |  | 1 |

## CAD (KiCad official)

- Symbol: `LMUN2211LT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lmun2211lt1g-etched.step` / `lmun2211lt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmun2211lt1g.step` / `lmun2211lt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172812759744512) (16 pp, sha256 `7a7fc5dcf748e5bd`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmun2211lt1g-datasheet.pdf)