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LMUN2134LT1G

LRC · Digital Transistors · SOT-23

LMUN2134LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base (input) of the PNP bias resistor transistor, connected through series resistor R1 (22 kΩ for LMUN2134LT1G) with R2 of 47 kΩ from base to emitter.
2 EMITTER power_in Emitter (ground) of the PNP bias resistor transistor, with maximum collector-emitter voltage VCEO of 50 Vdc.
3 COLLECTOR output Collector (output) of the PNP bias resistor transistor, rated for VCBO 50 Vdc, VCEO 50 Vdc and IC 100 mAdc maximum.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Cutoff Current ICBO 100 nAdc VCB = 50 V, IE = 0 2
Collector-Emitter Cutoff Current ICEO 500 nAdc VCE = 50 V, IB = 0 2
Emitter-Base Cutoff Current IEBO 0.13 mAdc VEB = 6.0 V, IC = 0 2
Collector-Base Breakdown Voltage V(BR)CBO 50 Vdc IC = 10 µA, IE = 0 2
Collector-Emitter Breakdown Voltage V(BR)CEO 50 Vdc IC = 2.0 mA, IB = 0 2
DC Current Gain hFE 80 130 VCE = 10 V, IC = 5.0 mA 3
Collector-Emitter Saturation Voltage VCE(sat) 0.25 Vdc IC = 10 mA, IB = 1 mA 3
Output Voltage (on) VOL 0.2 Vdc VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ 3
Output Voltage (off) VOH 4.9 Vdc VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ 3
Input Resistor R1 R1 15.4 22 28.6 kΩ 3
Collector-Base Voltage VCBO 50 Vdc TA = 25°C 1
Collector-Emitter Voltage VCEO 50 Vdc TA = 25°C 1
Collector Current IC 100 mAdc TA = 25°C 1
Total Device Dissipation, FR-4 minimum pad PD 246 mW TA = 25°C, FR-4 @ Minimum Pad 1
Total Device Dissipation, FR-4 1.0 x 1.0 inch pad PD 400 mW TA = 25°C, FR-4 @ 1.0 x 1.0 inch Pad 1
Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Thermal Resistance Junction-to-Ambient, minimum pad RθJA 508 °C/W FR-4 @ Minimum Pad 1
Thermal Resistance Junction-to-Ambient, 1.0 x 1.0 inch pad RθJA 311 °C/W FR-4 @ 1.0 x 1.0 inch Pad 1
Thermal Resistance Junction-to-Lead, minimum pad RθJL 174 °C/W FR-4 @ Minimum Pad 1
Thermal Resistance Junction-to-Lead, 1.0 x 1.0 inch pad RθJL 208 °C/W FR-4 @ 1.0 x 1.0 inch Pad 1

CAD (KiCad official)

  • Symbol: LMUN2134LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lmun2134lt1g-etched.step / lmun2134lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmun2134lt1g.step / lmun2134lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (8 pp, sha256 c2e117c3675fb855, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF