component

LMUN2113LT1G

Public Made by Adom

by adom

LRC Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorslmun2113lt1gfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
lmun2113lt1g / README.md
History Download
Ray Publish 0.1.0 55bc90f 9d ago

LMUN2113LT1G

LRC · Digital Transistors · SOT-23

LMUN2113LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base (input) of the PNP bias resistor transistor, connected through series resistor R1 (47 kΩ for LMUN2113) with R2 (47 kΩ) base-emitter resistor.
2 EMITTER passive Emitter (ground) of the PNP bias resistor transistor; the datasheet shows it as the ground reference of the circuit.
3 COLLECTOR passive Collector (output) of the PNP bias resistor transistor, rated VCEO 50 Vdc and IC 100 mAdc maximum.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Base Cutoff Current ICBO 100 nAdc VCB = 50 V, IE = 0 2
Collector-Emitter Cutoff Current ICEO 500 nAdc VCE = 50 V, IB = 0 2
Emitter-Base Cutoff Current IEBO 0.2 mAdc VEB = 6.0 V, IC = 0 2
Collector-Base Breakdown Voltage V(BR)CBO 50 Vdc IC = 10 µA, IE = 0 2
Collector-Emitter Breakdown Voltage V(BR)CEO 50 Vdc IC = 2.0 mA, IB = 0 2
DC Current Gain hFE 80 140 VCE = 10 V, IC = 5.0 mA 3
Collector-Emitter Saturation Voltage VCE(sat) 0.25 Vdc IC = 10 mA, IB = 0.3 mA 3
Output Voltage (on) VOL 0.2 Vdc VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ 3
Output Voltage (off) VOH 4.9 Vdc VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ 3
Input Resistor R1 R1 32.9 47 61.1 kΩ 3
Resistor Ratio R1/R2 0.8 1 1.2 3
Collector-Base Voltage VCBO 50 Vdc TA = 25°C 1
Collector-Emitter Voltage VCEO 50 Vdc TA = 25°C 1
Collector Current IC 100 mAdc TA = 25°C 1
Total Device Dissipation, FR-4 @ Minimum Pad PD 246 mW TA = 25°C, Note 1 1
Total Device Dissipation, FR-4 @ 1.0 x 1.0 inch Pad PD 400 mW TA = 25°C, Note 2 1
Junction and Storage Temperature Range TJ,Tstg -55 150 °C 1
Thermal Resistance Junction-to-Ambient, FR-4 @ Minimum Pad RθJA 508 °C/W Note 1 1
Thermal Resistance Junction-to-Ambient, FR-4 @ 1.0 x 1.0 inch Pad RθJA 311 °C/W Note 2 1
Thermal Resistance Junction-to-Lead, FR-4 @ Minimum Pad RθJL 174 °C/W Note 1 1
Thermal Resistance Junction-to-Lead, FR-4 @ 1.0 x 1.0 inch Pad RθJL 208 °C/W Note 2 1

CAD (KiCad official)

  • Symbol: LMUN2113LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lmun2113lt1g-etched.step / lmun2113lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmun2113lt1g.step / lmun2113lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (8 pp, sha256 991dccef4dd7f867, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF