component
LMR51635YDDCR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMR51635YDDCR
Texas Instruments · DC-DC Converters · TSOT-23-6
LMR51635YDDCR from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Converter feedback input; connect a resistor divider here to set the output voltage, and do not short this pin to ground during operation. |
| 2 | EN | input | Precision enable input that must not be left floating: high turns the converter on and low turns it off, it may be tied to VIN, and an external divider can set an adjustable UVLO. |
| 3 | VIN | power_in | Input supply pin for the internal bias LDO and high-side FET; connect it to the input supply and to the input bypass capacitor CIN, which must be connected directly to this pin and GND. |
| 4 | GND | power_in | Power ground, internally connected to the low-side FET source; connect it to system ground and to the ground side of CIN and COUT, keeping the connection to CIN as short as possible. |
| 5 | SW | output | Converter switching output, internally connected to the high-side FET source and low-side FET drain; connect it to the power inductor. |
| 6 | CB | passive | Bootstrap capacitor connection for the high-side FET driver; a 100 nF high-quality capacitor must be connected between this pin and SW. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage VIN to GND (absolute maximum) | -0.3 | 63 | V | 4 | |||
| Input voltage EN to GND (absolute maximum) | -0.3 | V | Printed as VIN + 0.3 V | 4 | |||
| Input voltage FB to GND (absolute maximum) | -0.3 | 5.5 | V | 4 | |||
| Output voltage SW to GND (absolute maximum) | -0.3 | 63 | V | 4 | |||
| Output voltage SW to GND (absolute maximum, transient) | -3.5 | 65 | V | Transient less than 10 ns | 4 | ||
| Output voltage CB to SW (absolute maximum) | -0.3 | 5.5 | V | 4 | |||
| Junction temperature TJ (absolute maximum) | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature (absolute maximum) | Tstg | -55 | 150 | °C | 4 | ||
| Input voltage VIN to GND (recommended operating) | 4.3 | 60 | V | 4 | |||
| Input voltage EN (recommended operating) | 0 | V | Printed as VIN V | 4 | |||
| Input voltage FB (recommended operating) | 0 | 4.5 | V | 4 | |||
| Output voltage VOUT (recommended operating) | VOUT | 0.8 | 30 | V | Output voltage must never drop below zero volts | 4 | |
| Output current IOUT (LM51635, recommended operating) | IOUT | 3.5 | A | Maximum continuous DC current may derate at high switching frequency or high ambient temperature | 4 | ||
| Operating junction temperature TJ (recommended operating) | TJ | -40 | 150 | °C | 4 | ||
| IQ(VIN) VIN quiescent current (non-switching) | IQ(VIN) | 26 | 46 | µA | VEN = 3V, PFM version only | 5 | |
| VIN UVLO rising threshold | VIN_UVLO(R) | 4 | 4.25 | V | VIN rising | 5 | |
| EN voltage rising threshold | VEN(R) | 1.103 | 1.226 | 1.349 | V | EN rising, enables switching | 5 |
| EN voltage falling threshold | VEN(F) | 0.887 | 0.985 | 1.084 | V | EN falling, disables switching | 5 |
| EN pin pull-up current / EN rising threshold after pull-up | IEN(P2) | 10 | 50 | nA | VEN = 3V | 5 | |
| Internal reference voltage VFB | VFB | 0.792 | 0.8 | 0.808 | V | 5 | |
| Switching frequency, CCM operation, Y version | fSW1(CCM) | 0.99 | 1.1 | 1.21 | MHz | VIN = 24V | 5 |
| Switching frequency dither (PFM option, around center frequency) | FDither | -8.5 | 8.5 | % | PFM option, frequency dither around center frequency (printed ±8.5%) | 5 | |
| High-side peak current limit, 3.5A version | IHS_PK(OC) | 4.2 | 5.1 | 6 | A | 3.5A version | 6 |
| Low-side valley current limit, 3.5A version | ILS_V(OC) | 3.2 | 4 | 4.8 | A | 3.5A version | 6 |
| RθJA junction-to-ambient thermal resistance | RθJA | 105.2 | °C/W | 5 | |||
| RθJA(effective) junction-to-ambient thermal resistance (TI EVM) | RθJA(effective) | 48.5 | °C/W | TI EVM | 5 | ||
| RθJC(top) junction-to-case (top) thermal resistance | RθJC(top) | 49.8 | °C/W | 5 | |||
| RθJB junction-to-board thermal resistance | RθJB | 24.1 | °C/W | 5 | |||
| ψJT junction-to-top characterization parameter | ψJT | 6.2 | °C/W | 5 | |||
| ψJB junction-to-board characterization parameter | ψJB | 23.9 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
LMR51635YDDCR - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
lmr51635yddcr-etched.step/lmr51635yddcr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr51635yddcr.step/lmr51635yddcr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
12f3a7061e268ca4, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).