component
LMR51625XDDCR
Public Made by Adomby adom
Texas Instruments , TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LMR51625XDDCR
Texas Instruments · IC · TSOT-23-6
LMR51625XDDCR from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback input to the converter; connect a resistor divider to set the output voltage and never short this terminal to ground during operation. |
| 2 | EN | input | Precision enable input (High = On, low = Off) that must not be floated, can be tied to VIN, and allows an adjustable UVLO via an external resistor divider. |
| 3 | VIN | power_in | Supply input to the internal bias LDO and high-side FET (4.3V to 60V operating); connect to the input supply with input bypass capacitors CIN directly between this pin and GND. |
| 4 | GND | power_in | Power ground connected internally to the source of the low-side FET; connect to system ground and the ground side of CIN and COUT with the shortest possible path to CIN. |
| 5 | SW | passive | Switching output of the converter, internally connected to the source of the high-side FET and drain of the low-side FET; connect to the power inductor. |
| 6 | CB | passive | Bootstrap capacitor connection for the high-side FET driver; connect a high quality 100nF capacitor from this pin to the SW pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-6 |
| Category | |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage VIN to GND | VIN | -0.3 | 63 | V | 4 | ||
| Input voltage EN to GND | EN | -0.3 | 0.3 | V | max printed as VIN + 0.3 | 4 | |
| Input voltage FB to GND | FB | -0.3 | 5.5 | V | 4 | ||
| Output voltage SW to GND | SW | -0.3 | 63 | V | 4 | ||
| Output voltage SW to GND transients | SW | -3.5 | 65 | V | less than 10ns transients | 4 | |
| Output voltage CB to SW | CB | -0.3 | 5.5 | V | 4 | ||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -1500 | 1500 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -750 | 750 | V | Charged-device model, ANSI/ESDA/JEDEC JS-002 | 4 | |
| Input voltage VIN to GND | VIN | 4.3 | 60 | V | 4 | ||
| Input voltage EN | EN | 0 | V | max printed as VIN | 4 | ||
| Input voltage FB | FB | 0 | 4.5 | V | 4 | ||
| Output voltage | VOUT | 0.8 | 30 | V | 4 | ||
| Output current (LM51625) | IOUT | 2.5 | A | 4 | |||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 105.2 | °C/W | DDC (SOT-23-THN) 6 pins | 5 | ||
| Junction-to-ambient thermal resistance with TI EVM | RθJA(effective) | 48.5 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 49.8 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 24.1 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 6.2 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 23.9 | °C/W | 5 | |||
| VIN quiescent current (non-switching) | IQ(VIN) | 26 | 46 | µA | VEN = 3V, PFM variant only | 5 | |
| Input supply current when in regulation | ISUPPLY | 29 | µA | VIN = 24V, VOUT = 3.3V, IOUT = 0A, RFBT = 1MΩ, PFM variant | 5 | ||
| VIN shutdown supply current | ISD(VIN) | 2 | µA | VEN = 0V | 5 | ||
| VIN UVLO rising threshold | VIN_UVLO(R) | 4 | 4.25 | V | VIN rising | 5 | |
| VIN UVLO falling threshold | VIN_UVLO(F) | 3.8 | V | VIN falling | 5 | ||
| VIN UVLO hysteresis | VIN_UVLO(H) | 0.2 | V | 5 | |||
| EN voltage rising threshold | VEN(R) | 1.103 | 1.226 | 1.349 | V | EN rising, enable switching | 5 |
| EN voltage falling threshold | VEN(F) | 0.887 | 0.985 | 1.084 | V | EN falling, disable switching | 5 |
| EN pin sourcing current post EN rising threshold | IEN(P2) | 10 | 50 | nA | VEN = 3V | 5 | |
| Reference voltage | VFB | 0.792 | 0.8 | 0.808 | V | 5 | |
| FB input leakage current | IFB(LKG) | 0.2 | nA | VFB = 0.8V | 5 | ||
| Switching frequency, CCM operation | fSW1(CCM) | 360 | 400 | 440 | kHz | "X" version, VIN = 24V | 5 |
| Switching frequency dithering | FDither | -8.5 | 8.5 | % | PFM option, frequency dithering over center frequency | 5 | |
| Internal fixed soft-start time | tSS | 4 | ms | The time of internal reference to increase from 0.08V to 0.72V | 5 | ||
| High-side MOSFET on-resistance | RDSON(HS) | 85 | mΩ | ISW = -100mA | 5 | ||
| Low-side MOSFET on-resistance | RDSON(LS) | 45 | mΩ | ISW = 100mA | 6 | ||
| Minimum ON pulse width | tON-MIN | 70 | ns | VIN = 24V, IOUT = 1A | 6 | ||
| Maximum ON pulse width | tON-MAX | 5 | µs | VIN = 24V, IOUT = 1A | 6 | ||
| Minimum OFF pulse width | tOFF-MIN | 200 | ns | VIN = 24V | 6 | ||
| High-side peak current limit | IHS_PK(OC) | 2.9 | 3.7 | 4.5 | A | 2.5A version | 6 |
| Low-side valley current limit | ILS_V(OC) | 2.3 | 2.8 | 3.3 | A | 2.5A version | 6 |
| Low-side negative current limit | ILS(NOC) | -2 | A | FPWM option, 2.5A version | 6 | ||
| Zero-cross detection current threshold | IZC | 0 | A | 6 | |||
| FB pin voltage required to trip short circuit hiccup mode | VHICCUP | 0.32 | V | 6 | |||
| Time between current-limit hiccup burst | tHICCUP | 85 | ms | 6 | |||
| Thermal shutdown threshold | TJ(SD) | 165 | °C | Temperature rising | 6 | ||
| Thermal shutdown hysteresis | TJ(HYS) | 20 | °C | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used | 22 |
CAD (KiCad official)
- Symbol:
LMR51625XDDCR - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
lmr51625xddcr-etched.step/lmr51625xddcr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr51625xddcr.step/lmr51625xddcr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
e1f7a10d36b45dc9, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).