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LMR51606YFDBVR

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TEXAS INSTRUMENTS Global Sourcing Parts, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMR51606YFDBVR

TEXAS INSTRUMENTS · Global Sourcing Parts · SOT-23-6

LMR51606YFDBVR from TEXAS INSTRUMENTS, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB power_out Bootstrap capacitor connection for the high-side FET driver; connect a high-quality 100-nF capacitor from this pin to the SW pin.
2 GND power_in Power ground pins connected internally to the low-side FET source; connect to system ground and the ground side of CIN and COUT, keeping the path to CIN as short as possible.
3 FB input Feedback input to the converter; connect a resistor divider to set the output voltage and never short this terminal to ground during operation.
4 EN input Precision enable input that must not float (high = on, low = off), can be tied to VIN, and allows an adjustable UVLO set by an external resistor divider.
5 VIN power_in Supply input to the internal bias LDO and high-side FET, connected to the input supply with input bypass capacitors CIN placed directly between this pin and GND.
6 SW power_out Switching output of the converter, internally connected to the high-side FET source and low-side FET drain, and connected to the power inductor.

Key specifications

Parameter Value
Manufacturer TEXAS INSTRUMENTS
Package SOT-23-6
Category Global Sourcing Parts
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN quiescent current, FPWM operation IQ(VIN) 420 µA VEN = 3 V, FPWM Operation 5
VIN shutdown supply current ISD(VIN) 0.8 3 µA VEN = 0 V 5
VIN UVLO rising threshold VINUVLO(R) 3.82 4 V VIN rising 5
VIN UVLO falling threshold VINUVLO(F) 3.4 3.56 V VIN falling 5
EN voltage rising threshold VEN(R) 1.1 1.227 1.36 V EN rising, enable switching 5
EN voltage falling threshold VEN(F) 0.85 1 1.15 V EN falling, disable switching 5
EN pin sourcing current post EN rising threshold IEN(P2) 10 50 nA VEN = 3 V 5
Reference voltage Vfb 0.788 0.8 0.812 V 5
Switching frequency, CCM operation Y version fSW(CCM) 0.935 1.1 1.265 Mhz CCM operation "Y" Version 5
High-side peak current limit LMR51606 IHS_PK(OC) 0.8 1.1 1.4 A LMR51606 6
Low-side valley current limit LMR51606 ILS_V(OC) 0.62 0.8 0.98 A LMR51606 6
Adjustable output voltage regulation VOUT -1.5 2.5 % PFM operation 6
Maximum switch duty cycle DMAX 98 % 6
VIN to GND VIN -0.3 70 V 4
FB to GND FB -0.3 5.5 V 4
SW to GND SW -0.3 70 V 4
SW to GND less than 10-ns transients SW -5 70 V SW to GND less than 10-ns transients 4
CBOOT to SW CBOOT -0.3 5.5 V 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
VIN to GND input voltage VIN 4 65 V 4
FB pin voltage FB 0 4.5 V 4
Output voltage VOUT 0.8 28 V 4
Output current Iout(LMR51606) Iout 0.6 A LMR51606 4
Operating junction temperature TJ -40 150 °C 4
VIN UVLO hysteresis VINUVLO(H) 0.25 V 5
FB input leakage current IFB(LKG) 0.2 nA VFB = 0.8 V 5
Internal fixed soft-start time tSS 2.3 ms 5
High-side MOSFET on-resistance RDSON(HS) 0.7 Ω VIN = 12 V, TJ = 25°C 5
Low-side MOSFET on-resistance RDSON(LS) 0.36 Ω VIN = 12 V, TJ = 25°C 5
Minimum ON pulse width tON(min) 80 ns VIN = 12 V, IOUT = 0.1A 5
Maximum ON pulse width tON(max) 5 µs VIN = 12 V, IOUT = 0.5A 5
Minimum OFF pulse width tOFF(min) 200 ns VIN = 5 V 6
Low-side negative current limit LMR51606 ILS(NOC) -0.36 A LMR51606 FPWM Only 6
Zero-cross detection current threshold IZC 0 A 6
Thermal shutdown threshold TJ(SD) 165 °C Temperature rising 6
Thermal shutdown hysteresis TJ(HYS) 20 °C 6
FB pin voltage to trip short-circuit hiccup mode VHC 0.32 V 6
Switch voltage dead time tD 5 ns 6
Junction-to-ambient thermal resistance RθJA 147.8 °C/W 5
Junction-to-ambient thermal resistance with EVM RθJA(Effective) 95 °C/W 5
Junction-to-case (top) thermal resistance RθJC(top) 71.1 °C/W 5
Junction-to-board thermal resistance RθJB 36.6 °C/W 5
Junction-to-top characterization parameter ψJT 14.2 °C/W 5
Junction-to-board characterization parameter ψJB 36.4 °C/W 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used 23

CAD (KiCad official)

  • Symbol: LMR51606YFDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lmr51606yfdbvr-etched.step / lmr51606yfdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr51606yfdbvr.step / lmr51606yfdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TEXAS INSTRUMENTS datasheet (35 pp, sha256 3bcfb87d2af56a09, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF