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LMR51603XDBVR

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Texas Instruments , SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMR51603XDBVR

Texas Instruments · IC · SOT-23-6

LMR51603XDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB passive Bootstrap capacitor connection for the high-side FET driver; connect a high quality 100nF capacitor from this pin to the SW pin.
2 GND power_in Power ground connected internally to the source of the low-side FET; connect to system ground and the ground side of CIN and COUT, with the path to CIN as short as possible.
3 FB input Feedback input to the converter; connect a resistor divider to set the output voltage (0.8V reference), connect to VOUT directly for fixed output, and never short this pin to ground during operation.
4 EN input Precision enable input, High = On, Low = Off; do not float, can be tied to VIN, and allows adjustable UVLO via an external resistor divider.
5 VIN power_in Supply input to the internal bias LDO and high-side FET, operating from 4V to 65V; connect to the input supply and input bypass capacitors CIN placed directly at this pin and GND.
6 SW passive Switching output of the converter, internally connected to the source of the high-side FET and drain of the low-side FET; connect to the power inductor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN quiescent current (FPWM) IQ(VIN) 420 µA VEN = 3V, FPWM operation 5
VIN quiescent current (non-switching) IQ(VIN) 26.5 40 µA VEN = 3V, PFM variant only 5
VIN shutdown supply current ISD(VIN) 0.8 3 µA VEN = 0V 5
VIN UVLO rising threshold VINUVLO(R) 3.82 4 V VIN rising 5
VIN UVLO falling threshold VINUVLO(F) 3.4 3.56 V VIN falling 5
EN voltage rising threshold VEN(R) 1.1 1.227 1.36 V EN rising, enable switching 5
EN voltage falling threshold VEN(F) 0.85 1 1.15 V EN falling, disable switching 5
EN pin sourcing current post EN rising threshold IEN(P2) 10 50 nA VEN = 3V 5
Reference voltage VFB 0.788 0.8 0.812 V 5
Switching frequency, CCM operation X version fSW(CCM) 340 400 460 KHz "X" Version 5
High-side peak current limit IHS_PK(OC) 0.4 0.55 0.7 A 6
Low-side valley current limit ILS_V(OC) 0.32 0.42 0.51 A 6
Input supply current when in regulation ISUPPLY 38 µA VIN = 24V, VOUT = 5V, IOUT = 0A, RFBB = 22.1kΩ, PFM variant 5
VIN UVLO hysteresis VINUVLO(H) 0.25 V 5
FB input leakage current IFB(LKG) 0.2 nA Adjustable configuration, VFB = 0.8V 5
Internal fixed soft-start time tSS 2.3 ms 5
High-side MOSFET on-resistance RDSON(HS) 0.7 Ω VIN = 12V, TJ = 25°C 5
Low-side MOSFET on-resistance RDSON(LS) 0.36 Ω VIN = 12V, TJ = 25°C 6
Minimum ON pulse width tON(min) 80 ns VIN = 12V, IOUT = 0.1A 6
Maximum ON pulse width tON(max) 5 µs VIN = 12V, IOUT = 0.3A 6
Minimum OFF pulse width tOFF(min) 200 ns VIN = 5V 6
Low-side negative current limit ILS(NOC) -0.27 A FPWM only 6
Zero-cross detection current threshold IZC 0 A 6
FB pin voltage to trip hiccup VHICCUP 0.32 V 6
Thermal shutdown threshold TJ(SD) 165 °C Temperature rising 6
Thermal shutdown hysteresis TJ(HYS) 20 °C 6
VIN to GND VIN -0.3 70 V 4
EN to GND EN -0.3 V max is VIN + 0.3 V 4
FB to GND FB -0.3 5.5 V 4
SW to GND SW -0.3 70 V 4
SW to GND less than 10ns transients SW -5 70 V less than 10ns transients 4
CBOOT to SW CBOOT -0.3 5.5 V 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN to GND VIN 4 65 V 4
EN voltage EN 0 V max is VIN 4
FB voltage FB 0 4.5 V 4
Output voltage VOUT 0.8 28 V 4
Output current IOUT 300 mA 4
Operating junction temperature TJ -40 150 °C 4
ESD HBM V(ESD) -2500 2500 V Human-body model (HBM) 4
ESD CDM V(ESD) -750 750 V Charged-device model (CDM) 4
Junction-to-ambient thermal resistance RθJA 147.8 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-ambient thermal resistance with EVM RθJA(Effective) 67.2 °C/W 5
Junction-to-case (top) thermal resistance RθJC(top) 71.1 °C/W 5
Junction-to-board thermal resistance RθJB 36.6 °C/W 5
Junction-to-top characterization parameter ψJT 14.2 °C/W 5
Junction-to-board characterization parameter ψJB 36.4 °C/W 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used 22

CAD (KiCad official)

  • Symbol: LMR51603XDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lmr51603xdbvr-etched.step / lmr51603xdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr51603xdbvr.step / lmr51603xdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 533dd4559c5b3411, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF