# LMR51420XFDDCR

**TEXAS INSTRUMENTS** · Global Sourcing Parts · SOT-23-6

LMR51420XFDDCR from TEXAS INSTRUMENTS, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power ground terminal connected internally to the source of the low-side FET; connect to system ground and the ground side of CIN and COUT with the shortest possible path to CIN. |
| 2 | SW | passive | Switching output of the converter, connected to the source of the high-side FET and drain of the low-side FET; connect to the power inductor. |
| 3 | VIN | power_in | Supply input to the internal bias LDO and high-side FET (4.5 V to 36 V operating); connect to the input supply with input bypass capacitors CIN placed directly at this pin and GND. |
| 4 | FB | input | Feedback input connected to a resistor divider from VOUT to set the output voltage against the 0.6-V reference; never short this pin to ground during operation. |
| 5 | EN | input | Precision enable input (rising threshold 1.227 V typ, falling 1.08 V typ; high = on, low = off) that can be tied to VIN or used with a divider for adjustable UVLO; do not float, and keep it no more than 0.3 V above VIN. |
| 6 | CB | passive | Bootstrap capacitor connection for the high-side FET driver; connect a high-quality 100-nF capacitor from this pin to the SW pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TEXAS INSTRUMENTS |
| Package | SOT-23-6 |
| Category | Global Sourcing Parts |
| Pins | 6 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN absolute max | VIN | -0.3 |  | 38 | V |  | 4 |
| EN absolute max | EN | -0.3 |  |  | V | max printed as VIN + 0.3 | 4 |
| FB absolute max | FB | -0.3 |  | 5.5 | V |  | 4 |
| SW DC absolute | SW | -0.3 |  | 38 | V | DC | 4 |
| SW transient absolute | SW | -3 |  | 38 | V | transient < 20 ns | 4 |
| CB absolute | CB | -0.3 |  | 43.5 | V |  | 4 |
| CB to SW absolute | CB to SW | -0.3 |  | 5.5 | V |  | 4 |
| Junction temperature absolute | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 4 |
| ESD HBM | V(ESD) | -1000 |  | 1000 | V | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 | 4 |
| ESD CDM | V(ESD) | -500 |  | 500 | V | Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002 | 4 |
| Input voltage VIN to GND | VIN | 4.5 |  | 36 | V |  | 4 |
| EN voltage | EN | 0 |  |  | V | max printed as VIN | 4 |
| FB voltage | FB | 0 |  | 4.5 | V |  | 4 |
| Output voltage | VOUT | 0.6 |  |  | V | max printed as 95% of VIN | 4 |
| Output current | Iout |  |  | 2 | A |  | 4 |
| Operating junction temperature | TJ | -40 |  | 150 | °C |  | 4 |
| Junction-to-ambient thermal resistance | RθJA |  | 107.8 |  | °C/W | DDC (SOT-23-6), 6 pins | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 52.4 |  | °C/W | DDC (SOT-23-6), 6 pins | 5 |
| Junction-to-board thermal resistance | RθJB |  | 23.3 |  | °C/W | DDC (SOT-23-6), 6 pins | 5 |
| Junction-to-top characterization parameter | ψJT |  | 9.3 |  | °C/W | DDC (SOT-23-6), 6 pins | 5 |
| Junction-to-board characterization parameter | ψJB |  | 23 |  | °C/W | DDC (SOT-23-6), 6 pins | 5 |
| VIN shutdown supply current | ISD(VIN) |  | 3 | 15 | µA | VEN = 0 V | 5 |
| VIN UVLO rising threshold | VINUVLO(R) |  | 3.89 | 4.5 | V | VIN rising | 5 |
| VIN UVLO falling threshold | VINUVLO(F) | 3.35 |  | 3.58 | V | VIN falling | 5 |
| VIN UVLO hysteresis | VINUVLO(H) |  | 0.3 |  | V |  | 5 |
| EN voltage rising threshold | VEN(R) | 1.1 | 1.227 | 1.36 | V | EN rising, enable switching | 5 |
| EN voltage falling threshold | VEN(F) | 0.95 | 1.08 | 1.22 | V | EN falling, disable switching | 5 |
| EN pin sourcing current post EN rising threshold | IEN(P2) |  | 10 | 200 | nA | VEN = 3 V | 5 |
| Reference voltage | Vfb | 0.591 | 0.6 | 0.609 | V |  | 5 |
| FB input leakage current | IFB(LKG) |  | 0.8 | 50 | nA | VFB = 1.2 V | 5 |
| Switching frequency, CCM, 500-kHz option | fSW1(CCM) | 450 | 500 | 560 | kHz | 500-kHz trim option | 5 |
| Internal fixed soft-start time | tSS | 3.2 | 4 | 5.4 | ms |  | 5 |
| High-side MOSFET on-resistance | RDSON(HS) |  | 0.12 |  | Ω | TJ = 25℃ | 5 |
| Low-side MOSFET on-resistance | RDSON(LS) |  | 0.07 |  | Ω | TJ = 25℃ | 5 |
| Minimum ON pulse width | tON(min) |  | 70 |  | ns | VIN = 12 V, IOUT = 2 A | 5 |
| Maximum ON pulse width | tON(max) |  | 6.76 |  | µs | VIN = 12 V, IOUT = 2 A | 5 |
| Minimum OFF pulse width | tOFF(min) |  | 150 |  | ns | VIN = 4.5 V | 5 |
| High-side peak current limit | IHS_PK(OC) | 2.7 | 3.5 | 5.1 | A | LM51420 | 5 |
| Low-side valley current limit | ILS_V(OC) | 1.7 | 2.5 | 3.4 | A | LM51420 | 6 |
| Low-side negative current limit | ILS(NOC) |  | -1 |  | A | LM51420 FPWM Only | 6 |
| Zero-cross detection current threshold | IZC |  | 0.02 |  | A |  | 6 |
| Thermal shutdown threshold | TJ(SD) |  | 163 |  | °C | Temperature rising | 6 |
| Thermal shutdown hysteresis | TJ(HYS) |  | 22 |  | °C |  | 6 |
| Operating input voltage range (system) | VIN | 4.5 |  | 36 | V |  | 6 |
| Adjustable output voltage regulation, FPWM | VOUT | -1.5 |  | 1.5 | % | FPWM operation | 6 |
| Maximum switch duty cycle | DMAX |  | 98 |  | % |  | 6 |
| FB pin voltage to trip hiccup mode | VHC |  | 0.24 |  | V |  | 6 |
| Switch voltage dead-time | tD |  | 6.5 |  | ns |  | 6 |
| Thermal shutdown temperature | TSD |  | 163 |  | °C | Shutdown temperature | 6 |
| Thermal shutdown recovery temperature | TSD |  | 141 |  | °C | Recovery temperature | 6 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | The SW pin connected to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used f | 21 |

## CAD (KiCad official)

- Symbol: `LMR51420XFDDCR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `lmr51420xfddcr-etched.step` / `lmr51420xfddcr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmr51420xfddcr.step` / `lmr51420xfddcr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TEXAS INSTRUMENTS datasheet](https://www.ti.com/lit/ds/symlink/lmr51420.pdf) (33 pp, sha256 `8cc7e8bc4ef9adba`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmr51420xfddcr-datasheet.pdf)