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LMR51410YFDBVR

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Texas Instruments Global Sourcing Parts, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMR51410YFDBVR

Texas Instruments · Global Sourcing Parts · SOT-23-6

LMR51410YFDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB power_out Bootstrap capacitor connection for the high-side FET gate driver; connect a 100nF quality capacitor between CB and SW, rated 16V or higher with X7R or X5R dielectric.
2 GND power_in Power ground, internally connected to the low-side FET source; connect to system ground and the ground side of CIN and COUT, keeping the connection to CIN as short as possible.
3 FB input Converter feedback input; connect a resistor divider to set the output voltage, and do not short this pin to ground during operation.
4 EN input Precision enable input that must not be left floating: high turns the converter on and low turns it off, it may be tied to VIN, its voltage must not exceed VIN + 0.3V, and an external divider can set an adjustable UVLO.
5 VIN power_in Supply input for the internal bias LDO and high-side FET, operating from 4V to 42V, with the input bypass capacitor connected directly between this pin and GND.
6 SW power_out Converter switch output, internally connected to the high-side FET source and low-side FET drain, which drives the power inductor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Global Sourcing Parts
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage VIN to GND VIN -0.3 45 V 4
Input voltage EN to GND EN -0.3 V max printed as VIN + 0.3 4
Input voltage FB to GND FB -0.3 5.5 V 4
Output voltage SW to GND SW -0.3 45 V 4
Output voltage SW to GND (transient) SW -5 50 V transient less than 10ns 4
Output voltage CBOOT to SW CBOOT -0.3 5.5 V 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
Input voltage VIN to GND (operating) VIN 4 42 V 4
Input voltage EN (operating) EN 0 V max printed as VIN 4
Input voltage FB (operating) FB 0 4.5 V 4
Output voltage VOUT (operating) VOUT 0.8 28 V 4
Output current Iout (LMR51410) Iout 1 A LMR51410; derating at high fSW or ambient per footnote 3 4
Operating junction temperature TJ -40 150 °C 4
VIN quiescent current, FPWM operation IQ(VIN) 420 µA VEN = 3V, FPWM operation 5
VIN shutdown supply current ISD(VIN) 0.8 3 µA VEN = 0V 5
VIN UVLO rising threshold VIN_UVLO(R) 3.82 4 V VIN rising 5
VIN UVLO falling threshold VIN_UVLO(F) 3.4 3.56 V VIN falling 5
EN voltage rising threshold VEN(R) 1.1 1.227 1.36 V EN rising, enables switching 5
EN voltage falling threshold VEN(F) 0.85 1 1.15 V EN falling, disables switching 5
EN pin pull current IEN(P2) 10 50 nA VEN = 3V 5
Voltage reference VFB 0.788 0.8 0.812 V 5
FB input leakage current IFB(LKG) 0.2 nA VFB = 0.8V 5
Switching frequency, CCM operation, Y version fSW(CCM) 0.935 1.1 1.265 MHz CCM operation, Y version 5
Maximum ON pulse width tON_MAX 5 µs VIN = 12V, IOUT = 0.5A 5
High-side peak current limit, LMR51410 IHS_PK(OC) 1.25 1.6 1.95 A LMR51410 6
Low-side valley current limit, LMR51410 ILS_V(OC) 0.9 1.1 1.3 A LMR51410 6
VIN operating input voltage range VIN 4 42 V 6
Maximum switch duty cycle DMAX 98 % 6
VIN UVLO hysteresis VIN_UVLO(H) 0.25 V 5
High-side MOSFET on-resistance RDSON(HS) 0.7 Ω VIN = 12V, TJ = 25°C 5
Low-side MOSFET on-resistance RDSON(LS) 0.36 Ω VIN = 12V, TJ = 25°C 5
Minimum ON pulse width tON_MIN 80 ns VIN = 12V, IOUT = 0.1A 5
Minimum OFF pulse width tOFF_MIN 200 ns VIN = 5V 5
Low-side negative current limit, LMR51410 FPWM only ILS(NOC) -0.66 A LMR51410, FPWM only 6
Zero-crossing detection current threshold IZC 0 A 6
Thermal shutdown threshold TJ(SD) 165 °C junction temperature rising 6
Thermal shutdown hysteresis TJ(HYS) 20 °C 6
Internal fixed soft-start time tSS 2.3 ms 5
FB voltage triggering short-circuit hiccup VHC 0.32 V 6
Time between current-limit hiccup bursts THICCUP 150 ms 6
Junction-to-ambient thermal resistance RθJA 147.8 °C/W DBV (SOT-23-6), JESD 51-7 4-layer board, simulated 5
Junction-to-ambient thermal resistance (effective) RθJA(Effective) 95 °C/W EVM board 5
Junction-to-case (top) thermal resistance RθJC(top) 71.1 °C/W DBV (SOT-23-6) 5
Junction-to-board thermal resistance RθJB 36.6 °C/W DBV (SOT-23-6) 5
Junction-to-top characterization parameter ψJT 14.2 °C/W DBV (SOT-23-6) 5
Junction-to-board characterization parameter ψJB 36.4 °C/W DBV (SOT-23-6) 5

CAD (KiCad official)

  • Symbol: LMR51410YFDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lmr51410yfdbvr-etched.step / lmr51410yfdbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr51410yfdbvr.step / lmr51410yfdbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 c9e4cc6df5596e11, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF