component

LMR51403YDBVR

Public Made by Adom

by adom

Texas Instruments , SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenticlmr51403ydbvrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17h ago
viewers lmr51403ydbvr: viewers · Ray 17h ago
lmr51403ydbvr-etched.glb Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr-etched.step lmr51403ydbvr: factory component page (tier=lcsc) · Ray 17h ago
lmr51403ydbvr-hero.glb lmr51403ydbvr: hero GLB from the etched model (keeps the MPN mark) · Ray 17h ago
lmr51403ydbvr-hero.overlay.json Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr.glb Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr.kicad_mod Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr.kicad_sym Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr.lbr Publish 0.1.0 · Ray 17h ago
lmr51403ydbvr.step Publish 0.1.0 · Ray 17h ago
package.json Publish 0.1.0 · Ray 17h ago
page.json Set visibility: public · Ray 17h ago
README.md Publish 0.1.0 · Ray 17h ago

LMR51403YDBVR

Texas Instruments · IC · SOT-23-6

LMR51403YDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CB passive Bootstrap capacitor connection for the high-side FET driver; connect a high quality 100nF capacitor from this pin to the SW pin.
2 GND power_in Power ground connected to the source of the low-side FET internally; connect to system ground and the ground side of CIN and COUT, with the path to CIN as short as possible.
3 FB input Feedback input to the converter; connect a resistor divider to set the output voltage and never short this terminal to ground during operation.
4 EN input Precision enable input (High = On, Low = Off) that must not be floated, can be tied to VIN, and allows an adjustable UVLO via an external resistor divider.
5 VIN power_in Supply input to the internal bias LDO and high-side FET (4V to 42V operating); connect to the input supply with input bypass capacitors CIN directly at this pin and GND.
6 SW passive Switching output of the converter, internally connected to the source of the high-side FET and drain of the low-side FET; connect to the power inductor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN quiescent current (non-switching) IQ(VIN) 26.5 40 µA VEN = 3V, PFM variant only 5
VIN shutdown supply current ISD(VIN) 0.8 3 µA VEN = 0V 5
VIN UVLO rising threshold VIN_UVLO(R) 3.82 4 V VIN rising 5
VIN UVLO falling threshold VIN_UVLO(F) 3.4 3.56 V VIN falling 5
EN voltage rising threshold VEN(R) 1.1 1.227 1.36 V EN rising, enable switching 5
EN voltage falling threshold VEN(F) 0.85 1 1.15 V EN falling, disable switching 5
EN pin sourcing current post EN rising threshold IEN(P2) 10 50 nA VEN = 3V 5
Reference voltage VFB 0.788 0.8 0.812 V 5
Switching frequency, CCM operation, Y version fSW(CCM) 0.935 1.1 1.265 MHz "Y" Version 5
High-side peak current limit IHS_PK(OC) 0.4 0.55 0.7 A LMR51403 6
Low-side valley current limit ILS_V(OC) 0.32 0.42 0.51 A LMR51403 6
Input voltage VIN to GND VIN 4 42 V 4
Input voltage EN VEN 0 V max = VIN 4
Input voltage FB VFB 0 4.5 V 4
Output voltage VOUT 0.8 28 V 4
Output current IOUT 300 mA 4
Operating junction temperature TJ -40 150 °C 4
Input voltage VIN to GND VIN -0.3 45 V 4
Input voltage EN to GND VEN -0.3 V max = VIN + 0.3 V 4
Input voltage FB to GND VFB -0.3 5.5 V 4
Output voltage SW to GND VSW -0.3 45 V 4
Output voltage SW to GND, transients VSW -5 50 V less than 10ns transients 4
Output voltage CBOOT to SW VCBOOT -0.3 5.5 V 4
Junction temperature TJ -40 150 °C 4
Storage temperature Tstg -55 150 °C 4
ESD HBM V(ESD) -2500 2500 V Human-body model, ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -750 750 V Charged-device model, ANSI/ESDA/JEDEC JS-002 4
Junction-to-ambient thermal resistance RθJA 147.8 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-ambient thermal resistance with EVM RθJA(Effective) 95 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 71.1 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-board thermal resistance RθJB 36.6 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-top characterization parameter ψJT 14.2 °C/W DBV (SOT-23-6), 6 pins 5
Junction-to-board characterization parameter ψJB 36.4 °C/W DBV (SOT-23-6), 6 pins 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used 21

CAD (KiCad official)

  • Symbol: LMR51403YDBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: lmr51403ydbvr-etched.step / lmr51403ydbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr51403ydbvr.step / lmr51403ydbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 a9add60e33040b51, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF