component
LMR36510ADDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownLMR36510ADDAR
Texas Instruments · DC-DC Converters · SOP-8-EP
LMR36510ADDAR from Texas Instruments, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power and analog ground terminal; all electrical parameters are measured relative to this pin. |
| 2 | VIN | power_in | Input power supply (4.2V to 65V recommended); connect quality bypass capacitors directly to this pin and PGND. |
| 3 | EN | input | Enable control input (0V to 65V); high level enables device, low level disables; do not leave open. |
| 4 | PG | output | Open-drain power good flag output; pulled low when output voltage out of regulation or EN is low; drive through external current-limiting pull-up resistor. |
| 5 | FB | input | Feedback input regulated to 1.0V reference; connect to output voltage feedback divider tap; do not leave open. |
| 6 | VCC | power_out | Internal 5V LDO output (nominal 5.0V, range 4.75V to 5.25V); connect 1µF bypass capacitor to PGND; reserve for internal circuits only. |
| 7 | BOOT | power_out | Bootstrap power supply for internal high-side gate driver; connect 100nF quality capacitor between BOOT and SW pin. |
| 8 | SW | output | Regulator switch node (-0.3V to 70.3V maximum); driven by internal MOSFETs between VIN and GND; connect to power inductor. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
LMR36510ADDAR - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
lmr36510addar-etched.step/lmr36510addar-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr36510addar.step/lmr36510addar.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
ef3035185e1964f7, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).