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LMR36015AQRNXRQ1

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Texas Instruments DC-DC Converters, VQFN-12(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LMR36015AQRNXRQ1

Texas Instruments · DC-DC Converters · VQFN-12(2x3)

LMR36015AQRNXRQ1 from Texas Instruments, in a VQFN-12(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGND power_in Power ground terminal to be connected to system ground and AGND, with short wide traces to CIN.
2 VIN power_in Input supply to the regulator, to be connected to CIN with short wide traces, specified at 4.2 V to 60 V.
3 NC unconnected No internal connection to the regulator; it is to be tied to the SW pin on the PCB to simplify the CBOOT capacitor connection.
4 BOOT power_in Bootstrap supply for the internal high-side driver, connected through a high-quality 100-nF capacitor to the SW pin.
5 VCC power_out Internal 5-V LDO output used for internal control circuits, decoupled with a high-quality 1-uF capacitor to GND and not to be used for external loads.
6 AGND power_in Analog ground and reference for the regulator; all electrical parameters are measured with respect to this pin and it is to be connected to system ground.
7 FB input Feedback input that connects to the output node for fixed VOUT or to the feedback divider tap, and must not be left floating or grounded.
8 PG output Open-drain power-good flag output that is high when power is OK and low when power is bad, going low when EN is low, and it can be left open or grounded when unused.
9 EN input Enable input where high turns the device ON and low turns it OFF, it can be connected directly to VIN, and it must not be left floating.
10 VIN power_in Input supply to the regulator, to be connected to CIN with short wide traces, specified at 4.2 V to 60 V.
11 PGND power_in Power ground terminal to be connected to system ground and AGND, with short wide traces to CIN.
12 SW power_out Regulator switch node that connects to the power inductor and is to be tied to the NC pin on the PCB to simplify the CBOOT connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-12(2x3)
Category Power Management (PMIC)
Pins 12

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating quiescent current (non-switching) IQ-nonSW 18 26 36 µA VEN = 3.3 V (PFM variant only) 7
Internal VCC voltage VCC 4.75 5 5.25 V 6 V ≤ VIN ≤ 60 V 7
Internal VCC undervoltage lockout rising VCC-UVLO-Rising 3.6 3.8 4 V VCC rising 7
Internal VCC undervoltage lockout falling VCC-UVLO-Falling 3.1 3.3 3.5 V VCC falling 7
Enable input high level for VOUT VEN-VOUT-H 1.157 1.231 1.3 V VENABLE rising 7
Feedback voltage VFB 0.985 1 1.015 V 7
Output voltage (3.3 V fixed) VOUT-3.3V-Fixed 3.23 3.3 3.37 V 7
Feedback leakage current (3.3 V fixed option) ILKG-VOUT-3.3V-Fixed 1.4 1.8 µA VOUT = 3.3 V (Fixed Option) 7
High-side current limit ISC 2 2.4 2.8 A 7
Low-side current limit ILS-LIMIT 1.55 1.8 2.07 A 7
Negative current limit IL-NEG -1.8 -1.4 -0.9 A FPWM variant only 7
Power-good upper threshold rising VPG-HIGH-UP 105 107 110 % rising, % of FB voltage 8
Power-good lower threshold falling VPG-LOW-DN 90 93 95 % falling, % of FB voltage 8
Power-good rising/falling edge deglitch delay TPG 80 140 200 µs 8
Power-good on-resistance RPG 80 165 Ω VEN = 2.5 V 8
Power-good on-resistance RPG 35 90 Ω VEN = 0 V 8
Internal oscillator frequency (2.1-MHz variant) FOSC 1.95 2.1 2.35 MHz 2.1-MHz variant 8
Internal oscillator frequency (400-kHz variant) FOSC 340 400 460 kHz 400-kHz variant 8
High-side MOSFET ON-resistance RDS-ON-HS 225 435 mΩ IOUT = 0.5 A 8
Low-side MOSFET ON-resistance RDS-ON-LS 150 280 mΩ IOUT = 0.5 A 8
Minimum switch on-time tON-MIN 55 83 ns 8
Minimum switch off-time tOFF-MIN 53 73 ns 8
Maximum switch on-time tON-MAX 7 12 µs 8
Internal soft-start time tSS 3 4.5 6 ms 8
Adjustable output voltage regulation VOUT -1.5 2.5 % PFM operation 9
Voltage regulation for VOUT = 3.3 V fixed VOUT 3.28 3.33 3.37 V FPWM operation 9
Spread spectrum frequency span FsSS -4 4 % Frequency span of spread spectrum operation 9
Thermal shutdown temperature TSD 170 °C Shutdown temperature 9
Thermal shutdown recovery temperature TSD 158 °C Recovery temperature 9
Input voltage VIN to PGND VIN 4.2 60 V VIN to PGND 6
EN to PGND EN 0 60 V EN to PGND 6
PG to PGND PG 0 18 V PG to PGND 6
Output current IOUT 0 1.5 A 6
Input voltage VIN to PGND VIN -0.3 66 V VIN to PGND 6
Input voltage EN to AGND EN -0.3 66.3 V EN to AGND 6
Input voltage FB to AGND FB -0.3 5.5 V FB to AGND 6
Input voltage PG to AGND PG -0.3 22 V PG to AGND 6
Input voltage AGND to PGND AGND-PGND -0.3 0.3 V AGND to PGND 6
Output voltage SW to PGND SW -0.3 66.3 V SW to PGND 6
Output voltage SW to PGND less than 10-ns transients SW -3.5 66.3 V SW to PGND less than 10-ns transients 6
Output voltage CBOOT to SW CBOOT-SW -0.3 5.5 V CBOOT to SW 6
Output voltage VCC to AGND VCC -0.3 5.5 V VCC to AGND 6
Junction temperature TJ -40 150 °C 6
Storage temperature Tstg -65 150 °C 6
Shutdown quiescent current ISD 5 µA VEN = 0 V; measured at VIN pin 7
Enable input high level for VCC output VEN-VCC-H 1.14 V VENABLE rising 7
Enable input low level for VCC output VEN-VCC-L 0.3 V VENABLE falling 7
Enable input hysteresis for VOUT VEN-VOUT-HYS 110 mV Hysteresis below VENABLE-H; falling 7
Zero cross detector threshold IL-ZC 0.02 A PFM variants only 7
High FB voltage required to trip short-circuit hiccup mode VHC 0.4 V 9
Junction-to-ambient thermal resistance RθJA 72.5 °C/W RNX (VQFN-HR) 12 pins 7
Junction-to-case (top) thermal resistance RθJC(top) 35.9 °C/W RNX (VQFN-HR) 12 pins 7
Junction-to-board thermal resistance RθJB 23.3 °C/W RNX (VQFN-HR) 12 pins 7
Junction-to-top characterization parameter ψJT 0.8 °C/W RNX (VQFN-HR) 12 pins 7
Junction-to-board characterization parameter ψJB 23.5 °C/W RNX (VQFN-HR) 12 pins 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper 8. Keep switch area small. Keep the copper area connecting the SW pin to the inductor as short and wide as 36

CAD (KiCad official)

  • Symbol: LMR36015AQRNXRQ1
  • Footprint: Adom_Gen:Texas_Instruments_LMR36015
  • 3D model: VQFN-12(2x3) (KiCad packages3D, STEP)
  • 3D model files: lmr36015aqrnxrq1-etched.step / lmr36015aqrnxrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr36015aqrnxrq1.step / lmr36015aqrnxrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (53 pp, sha256 4172de24e94e7067, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF