component
LMR23630AQDDARQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 22h ago |
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| lmr23630aqddarq1-etched.glb | 22h ago |
| lmr23630aqddarq1-etched.step | 22h ago |
| lmr23630aqddarq1-hero.glb | 22h ago |
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| lmr23630aqddarq1.lbr | 22h ago |
| lmr23630aqddarq1.step | 22h ago |
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LMR23630AQDDARQ1
Texas Instruments · DC-DC Converters · SOIC-8-EP
LMR23630AQDDARQ1 from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW | output | Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor. |
| 2 | BOOT | passive | Boot-strap capacitor connection for high-side driver. Connect a high-quality, 100-nF capacitor from BOOT to SW. |
| 3 | VCC | power_out | Internal bias supply output for bypassing. Connect a 2.2-μF, 16-V or higher capacitance bypass capacitor from this pin to AGND. Do not connect external loading to this pin. Never short this pin to ground during operation. |
| 4 | FB | input | Feedback input to regulator, connect the midpoint of feedback resistor divider to this pin. |
| 5 | EN/SYNC | input | Enable input to regulator. High = On, Low = Off. Can be connected to VIN. Do not float. Adjust the input undervoltage lockout with two resistors. The internal oscillator can be synchronized to an external clock by coupling a positive pulse into this pin through a small coupling capacitor. See Enable/Synchronization for details. |
| 6 | AGND | power_in | Analog ground pin. Ground reference for internal references and logic. Connect to system ground. |
| 7 | VIN | power_in | Input supply voltage. |
| 8 | PGND | power_in | Power ground pin, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. |
| 9 | PAD | power_in | Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
LMR23630AQDDARQ1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lmr23630aqddarq1-etched.step/lmr23630aqddarq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr23630aqddarq1.step/lmr23630aqddarq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
3ff6111effc8beb1, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).