component
LMR16020PDDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
4bce053
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{
"schema": "adom.pads/1",
"slug": "lmr16020pddar",
"footprint": "TI_SO-PowerPAD-8",
"generated_from": {
"footprint": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.78,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "TI_SO-PowerPAD-8@sha256:251b438f7e2e0404"
},
"pad_count": 9,
"symbol_pins": [
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
-1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "BOOT",
"type": "passive",
"description": "Bootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1 µF capacitor from BOOT to SW. Absolute max BOOT-to-GND = 71 V; BOOT-to-SW = 6.5 V.",
"is_pin1": true,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
-0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "VIN",
"type": "power_in",
"description": "Power supply input, 4.3 V to 60 V operating (65 V absolute max). Connect bypass capacitor CIN between VIN and GND with minimum trace length.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "EN",
"type": "input",
"description": "Enable pin with internal pull-up current source. Pull below 1.2 V (typ threshold 1.20 V) to disable; float or tie to VIN to enable. Can be driven by a resistor divider from VIN to program the input under-voltage lockout.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "rect",
"at": [
-2.78,
1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "RT/SYNC",
"type": "bidirectional",
"description": "Resistor Timing or External Clock input. A resistor from RT/SYNC to GND sets the switching frequency (200 kHz-2.5 MHz). Driving the pin above the PLL threshold switches it to a synchronization input (250 kHz-2.3 MHz); if clocks stop, it reverts to resistor-programmed mode.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "FB",
"type": "input",
"description": "Feedback input pin. Connect to the resistor divider from VOUT to set the output voltage; internal reference VFB = 0.750 V (typ). Do not short this pin to GND during operation.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "PGOOD",
"type": "output",
"description": "Power-Good open-drain output flag. Use a 10 kΩ to 100 kΩ pull-up resistor to a logic rail or DC voltage no higher than 7 V. Asserts when FB is within roughly 94%-107% of the reference.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
-0.635
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "GND",
"type": "power_in",
"description": "System ground pin. Return for VIN bypass and internal control circuitry.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "rect",
"at": [
2.78,
-1.905
],
"rot": 0.0,
"size": [
1.91,
0.61
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "SW",
"type": "power_out",
"description": "Switching output of the regulator, internally connected to the high-side power MOSFET (155 mΩ RDS(on)). Connect to the power inductor and to the catch diode's cathode. SW-to-GND rating: -3 V to 65 V absolute max.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "rect",
"at": [
-0.6025,
-0.775
],
"rot": 0.0,
"size": [
1.205,
1.55
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "9",
"name": "Thermal Pad",
"type": "power_in",
"description": "Exposed thermal pad on package underside; primary heat dissipation path from the die. Must be soldered to the PCB ground plane for proper thermal performance and electrical ground reference.",
"is_pin1": false,
"source": {
"geometry": "TI_SO-PowerPAD-8.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}