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LMR14050SQDPRRQ1
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Texas Instruments DC-DC Converters, WSON-10-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+48@@ -0,0 +1,48 @@+# LMR14050SQDPRRQ1++**Texas Instruments** · DC-DC Converters · WSON-10-EP(4x4)++LMR14050SQDPRRQ1 from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | power_out | Bootstrap capacitor connection for the high-side MOSFET gate driver, where a quality 0.1 µF capacitor (rated 16 V or higher, X7R or X5R) is connected between BOOT and SW. |+| 2 | VIN | power_in | Supply input for the regulator, with a recommended operating range of 4 V to 40 V, and the path from VIN to the input bypass capacitor CIN and GND must be kept as short as possible. |+| 3 | VIN | power_in | Second supply input pin tied to VIN, with a recommended operating range of 4 V to 40 V, and the path from VIN to the input bypass capacitor CIN and GND must be kept as short as possible. |+| 4 | EN | input | Enable pin with an internal pull-up current source that disables the device when pulled below 1.2 V, while leaving it floating or connecting it to VIN enables the device, and it can be used with two resistors to set the input UVLO. |+| 5 | RT/SYNC | input | Switching-frequency pin, programmed by a resistor RT to GND (200 kHz to 2.5 MHz) or driven by an external clock (250 kHz to 2.3 MHz) with a recommended range of 0 V to 3.3 V, and it must not be left floating or shorted to ground. |+| 6 | SS | input | Soft-start pin, where a capacitor from SS to GND sets the output ramp time using a typical 3 µA charge current, and the maximum CSS for the WSON package is 4.7 nF. |+| 7 | FB | input | Feedback input connected to the output voltage divider that sets VOUT against the 0.75 V typical reference, with a recommended range of 0 V to 5 V, and it must not be shorted to ground during operation. |+| 8 | PGOOD | output | Open-drain power-good flag output that needs a 10 kΩ to 100 kΩ pull-up to a logic rail or DC voltage not higher than 7 V. |+| 9 | GND | power_in | System ground pin that serves as the regulator ground reference and must connect to the system ground plane. |+| 10 | SW | power_out | Regulator switching output connected internally to the low-side power MOSFET and to the power inductor, with a recommended range of -1 V to 40 V. |+| 11 | Thermal Pad | power_in | Exposed thermal pad that is the main heat-dissipation path for the die and must be connected to a ground layer on the PCB. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-10-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 11 |++## CAD (KiCad official)++- Symbol: `LMR14050SQDPRRQ1`+- Footprint: `Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm`+- 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `lmr14050sqdprrq1-etched.step` / `lmr14050sqdprrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmr14050sqdprrq1.step` / `lmr14050sqdprrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmr14050-q1) (38 pp, sha256 `83448eca383abb85`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lmr14050sqdprrq1-datasheet.pdf)
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The; The datasheet text provided is a Chinese translation of SNVSAG2. The pin descriptions were written i",+ "1/11 pins cited to the wrong page (name found elsewhere): ['11:Thermal Pad@p3']"+ ],+ "pages_sent": 26,+ "cost_usd": 0.1342,+ "at": "2026-10-07T23:28:20"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lmr14050-q1",+ "pages": 38,+ "sha256": "83448eca383abb85",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 11,+ "described": 11,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lmr14050sqdprrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 3.95,+ 0.8+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "ef3c2f392fea7049285bfc942095cbd03d5bb47d74597dd80d1bc887363be656",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lmr14050sqdprrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 3.95,+ 0.8+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5d503ce7ef230ac4d63eb2438942f519a780fb5fade4cccd0a75a0daa5082d87",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}