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Contents

README

markdown

LMR14030SSQDDARQ1

Texas Instruments · DC-DC Converters · SOIC-8-EP

LMR14030SSQDDARQ1 from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT output Bootstrap capacitor connection to high-side MOSFET driver; connect 0.1µF capacitor between BOOT and SW pins.
2 VIN power_in Connection to power supply and bypass capacitor CIN with input voltage range 4V to 40V; maintain shortest path from VIN pin to high-frequency bypass capacitor and GND.
3 EN input Enable pin with internal pull-up current source; pull below 1.2V to disable device, leave floating or connect to VIN to enable; UVLO threshold adjustable with two resistors.
4 RT/SYNC input Resistor timing or external clock input; use external resistor to program switching frequency 200kHz to 2.5MHz, or apply external clock 250kHz to 2.3MHz with pull above PLL threshold.
5 FB input Feedback input pin connected to feedback voltage divider to set VOUT; do not short this pin to ground during operation.
6 SS input Soft-start control pin; connect to capacitor to set soft-start time.
7 GND power_in System ground pin.
8 SW output Switching output of regulator; internally connected to low-side power MOSFET; connect to power inductor.
9 Thermal Pad power_in Primary heat dissipation path of die; must be connected to PCB ground layer for thermal and mechanical performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8-EP
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: LMR14030SSQDDARQ1
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: lmr14030ssqddarq1-etched.step / lmr14030ssqddarq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmr14030ssqddarq1.step / lmr14030ssqddarq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 1f91b09fa6ebdebe, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF