# LMR14020SQDPRTQ1

**Texas Instruments** · DC-DC Converters · WSON-10-EP(4x4)

LMR14020SQDPRTQ1 from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_out | Bootstrap capacitor connection for the high-side MOSFET gate driver, where a quality 0.1 µF capacitor (X7R/X5R, rated 16 V or higher) connects between BOOT and SW. |
| 2 | VIN | power_in | Power input and connection to the input bypass capacitor CIN, with a 4 V to 40 V operating input range; the path from VIN to CIN and GND must be kept as short as possible. |
| 3 | VIN | power_in | Power input and connection to the input bypass capacitor CIN, with a 4 V to 40 V operating input range; the path from VIN to CIN and GND must be kept as short as possible. |
| 4 | EN | input | Enable input with an internal pull-up current source, where pulling it below 1.2 V disables the device, leaving it floating or connecting it to VIN enables the device, and the recommended range is 0 V to 40 V (absolute maximum 44 V). |
| 5 | RT/SYNC | input | Switching frequency timing-resistor connection or external clock sync input, which must not be left floating or shorted to ground and is recommended for 0 V to 3.3 V, with sync range 250 kHz to 2.3 MHz. |
| 6 | SS | input | Soft-start control pin, where an external capacitor to GND sets the soft-start time and CSS is limited to a maximum of 4.7 nF in the WSON package. |
| 7 | FB | input | Feedback input connected to the output divider to set VOUT, tied directly to VOUT for a fixed output, must not be shorted to ground during operation, and is recommended for 0 V to 5 V (absolute maximum 7 V for DPR). |
| 8 | PGOOD | output | Open-drain power-good flag output that requires a 10 kΩ to 100 kΩ pull-up to a logic rail or other DC voltage not exceeding 7 V. |
| 9 | GND | power_in | System ground pin. |
| 10 | SW | power_out | Regulator switching output connected internally to the low-side power MOSFET and to the power inductor, with absolute limits of -3 V to 44 V and recommended -1 V to 40 V. |
| 11 | Thermal Pad | power_in | Primary heat-dissipation path for the die that must be connected to a ground layer on the PCB. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(4x4) |
| Category | Power Supply Chip |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN, EN to GND (absolute maximum) | VIN, EN | -0.3 |  | 44 | V |  | 4 |
| BOOT to GND (absolute maximum) | BOOT | -0.3 |  | 49 | V |  | 4 |
| SS to GND (absolute maximum) | SS | -0.3 |  | 5 | V |  | 4 |
| FB to GND (absolute maximum, DPR package) | FB | -0.3 |  | 7 | V | DPR package | 4 |
| RT/SYNC to GND (absolute maximum) | RT/SYNC | -0.3 |  | 3.6 | V |  | 4 |
| PGOOD to GND (absolute maximum) | PGOOD | -0.3 |  | 7 | V |  | 4 |
| BOOT to SW (absolute maximum, DPR package) | BOOT-SW |  |  | 6.5 | V | DPR package | 4 |
| SW to GND (absolute maximum) | SW | -3 |  | 44 | V |  | 4 |
| Junction temperature TJ (absolute maximum) | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature (absolute maximum) | Tstg | -65 |  | 150 | °C |  | 4 |
| ESD human body model | V(ESD) | -2000 |  | 2000 | V | HBM, AEC Q100-002 | 4 |
| ESD charged device model | V(ESD) | -750 |  | 750 | V | CDM, AEC Q100-011 | 4 |
| VIN input voltage (recommended) | VIN | 4 |  | 40 | V |  | 4 |
| VOUT output voltage (recommended) | VOUT | 0.8 |  | 28 | V |  | 4 |
| BOOT (recommended) | BOOT |  |  | 45 | V |  | 4 |
| SW (recommended) | SW | -1 |  | 40 | V |  | 4 |
| FB (recommended) | FB | 0 |  | 5 | V |  | 4 |
| EN (recommended) | EN | 0 |  | 40 | V |  | 4 |
| RT/SYNC (recommended) | RT/SYNC | 0 |  | 3.3 | V |  | 4 |
| SS (recommended) | SS | 0 |  | 3 | V |  | 4 |
| PGOOD to GND (recommended) | PGOOD | 0 |  | 5 | V |  | 4 |
| Switching frequency range, RT mode (recommended) | fSW | 200 |  | 2500 | kHz | RT mode | 4 |
| Switching frequency range, SYNC mode (recommended) | fSW | 250 |  | 2300 | kHz | SYNC mode | 4 |
| Operating junction temperature (recommended) | TJ | -40 |  | 125 | °C |  | 4 |
| VIN operating input voltage | VIN | 4 |  | 40 | V |  | 5 |
| UVLO rising threshold |  | 3.5 | 3.7 | 3.9 | V |  | 5 |
| Shutdown supply current | ISHDN |  | 1 | 3 | μA | VEN = 0V, TJ = 25°C, 4.0V ≤ VIN ≤ 40V | 5 |
| EN threshold voltage | VEN_TH | 1.05 | 1.2 | 1.38 | V |  | 5 |
| PGOOD leakage current at high output | IPG |  | 10 | 200 | nA | VPull-Up = 5V | 5 |
| Minimum VIN for valid PGOOD output | VIN_PG_MIN |  | 1.6 | 1.95 | V | IPull-Up = 100μA, VPull-Up < 5V | 5 |
| Feedback voltage | VFB | 0.744 | 0.75 | 0.756 | V | TJ = 25°C | 6 |
| Feedback voltage | VFB | 0.735 | 0.75 | 0.765 | V | TJ = -40°C to 125°C | 6 |
| High-side MOSFET on-resistance | RDS_ON |  | 90 | 180 | mΩ | VIN = 12V | 6 |
| High-side MOSFET current limit | ILIMT | 2.13 | 3.15 | 4.6 | A | VIN = 12V, TJ = -40°C to 125°C, open loop | 6 |
| Switching frequency | fSW | 1758 | 1912 | 2066 | kHz | RT = 11.5kΩ | 6 |
| Switching frequency range, SYNC mode | fSW | 250 |  | 2300 | kHz |  | 6 |
| Switching frequency dither | FDITHER | -6 |  | 6 | % | Spread-spectrum option, dither around center frequency | 6 |
| Junction-to-ambient thermal resistance | RθJA |  | 36.5 |  | °C/W | DPR (WSON-10) package | 5 |
| Junction-to-top characterization parameter | ψJT |  | 0.3 |  | °C/W | DPR (WSON-10) package | 5 |
| Junction-to-board characterization parameter | ψJB |  | 13.8 |  | °C/W | DPR (WSON-10) package | 5 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 35.2 |  | °C/W | DPR (WSON-10) package | 5 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) |  | 3.1 |  | °C/W | DPR (WSON-10) package | 5 |
| Junction-to-board thermal resistance | RθJB |  | 13.6 |  | °C/W | DPR (WSON-10) package | 5 |

## CAD (KiCad official)

- Symbol: `LMR14020SQDPRTQ1`
- Footprint: `Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm`
- 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `lmr14020sqdprtq1-etched.step` / `lmr14020sqdprtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmr14020sqdprtq1.step` / `lmr14020sqdprtq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmr14020-q1) (37 pp, sha256 `6e24800c10410b48`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmr14020sqdprtq1-datasheet.pdf)