component
LMR14020SQDPRRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WSON-10-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMR14020SQDPRRQ1
Texas Instruments · DC-DC Converters · WSON-10-EP(4x4)
LMR14020SQDPRRQ1 from Texas Instruments, in a WSON-10-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap capacitor connection for the high-side MOSFET driver; connect a high quality 0.1 μF capacitor from BOOT to SW. |
| 2 | VIN | power_in | Connect to the power supply and bypass capacitor CIN; the path from VIN to the high frequency bypass CIN and GND must be as short as possible. |
| 3 | VIN | power_in | Connect to the power supply and bypass capacitor CIN; the path from VIN to the high frequency bypass CIN and GND must be as short as possible. |
| 4 | EN | input | Enable pin with internal pull-up current source; pull below 1.2 V to disable, float or connect to VIN to enable, and adjust the input undervoltage lockout with two resistors. |
| 5 | RT/SYNC | input | Resistor timing or external clock input; an external resistor to ground sets the switching frequency, and pulling the pin above the PLL upper threshold makes it a synchronization input. |
| 6 | SS | input | Soft-start control pin; connect to a capacitor to set the soft-start time. |
| 7 | FB | input | Feedback input; connect to the feedback divider to set VOUT, or directly to VOUT for fixed output, and do not short this pin to ground during operation. |
| 8 | PGOOD | output | Open-drain power-good flag output; use a 10 kΩ to 100 kΩ pull-up resistor to a logic rail or other DC voltage no higher than 7 V. |
| 9 | GND | power_in | System ground pin. |
| 10 | SW | power_out | Switching output of the regulator, internally connected to the high-side power MOSFET; connect to the power inductor. |
| 11 | Thermal Pad | power_in | Major heat dissipation path of the die; must be connected to the ground plane on the PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-10-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltages VIN, EN to GND | -0.3 | 44 | V | 4 | |||
| BOOT to GND | -0.3 | 49 | V | 4 | |||
| SS to GND | -0.3 | 5 | V | 4 | |||
| FB to GND (DPR package) | -0.3 | 7 | V | 4 | |||
| RT/SYNC to GND | -0.3 | 3.6 | V | 4 | |||
| PGOOD to GND | -0.3 | 7 | V | 4 | |||
| BOOT to SW (DPR package) | 6.5 | V | 4 | ||||
| SW to GND | -3 | 44 | V | 4 | |||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Buck regulator VIN | VIN | 4 | 40 | V | 4 | ||
| Buck regulator VOUT | VOUT | 0.8 | 28 | V | 4 | ||
| Buck regulator BOOT | BOOT | 45 | V | 4 | |||
| Buck regulator SW | SW | -1 | 40 | V | 4 | ||
| Buck regulator FB | FB | 0 | 5 | V | 4 | ||
| Control EN | EN | 0 | 40 | V | 4 | ||
| Control RT/SYNC | RT/SYNC | 0 | 3.3 | V | 4 | ||
| Control SS | SS | 0 | 3 | V | 4 | ||
| Control PGOOD to GND | PGOOD | 0 | 5 | V | 4 | ||
| Switching frequency range at RT mode | 200 | 2500 | kHz | 4 | |||
| Switching frequency range at SYNC mode | 250 | 2300 | kHz | 4 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| VIN operation input voltage | VIN | 4 | 40 | V | 5 | ||
| UVLO rising threshold | 3.5 | 3.7 | 3.9 | V | 5 | ||
| Shutdown supply current | ISHDN | 1 | 3 | μA | VEN = 0 V, TJ = 25°C, 4.0 V ≤ VIN ≤ 40 V | 5 | |
| EN threshold voltage | VEN_TH | 1.05 | 1.2 | 1.38 | V | 5 | |
| Feedback voltage | VFB | 0.744 | 0.75 | 0.756 | V | TJ = 25°C | 6 |
| Feedback voltage | VFB | 0.735 | 0.75 | 0.765 | V | TJ = -40°C to 125 °C | 6 |
| On-resistance | RDS_ON | 90 | 180 | mΩ | VIN = 12 V | 6 | |
| Current limit | ILIMT | 2.13 | 3.15 | 4.6 | A | VIN = 12 V, TJ = -40°C to 125°C, Open Loop | 6 |
| PGOOD leakage current at high level output | IPG | 10 | 200 | nA | VPull-Up = 5 V | 5 | |
| Minimum VIN for valid PGOOD output | VIN_PG_MIN | 1.6 | 1.95 | V | VPull-Up < 5 V at IPull-Up = 100 μA | 5 | |
| Switching frequency | fSW | 1758 | 1912 | 2066 | kHz | RT = 11.5 kΩ | 6 |
| Switching frequency range at SYNC mode | 250 | 2300 | kHz | 6 | |||
| Switching frequency dithering | FDITHER | -6 | 6 | % | Spread spectrum option, frequency dithering over center frequency | 6 | |
| Minimum SYNC input pulse width | TSYNC_MIN | 30 | ns | Measured at 500 kHz, VSYNC_HI > 3 V, VSYNC_LO < 0.3 V | 6 | ||
| Operating quiescent current (non-switching) | IQ | 40 | μA | VFB = 1.0 V, TJ = 25°C | 5 | ||
| EN PIN current, enable threshold +50 mV | IEN_PIN | -4.6 | μA | Enable threshold +50 mV | 5 | ||
| EN PIN current, enable threshold -50 mV | IEN_PIN | -1 | μA | Enable threshold -50 mV | 5 | ||
| EN hysteresis current | IEN_HYS | -3.6 | μA | 5 | |||
| SS pin current | ISS | -3 | μA | TJ = 25°C | 5 | ||
| Power-good flag under voltage tripping threshold (power good) | VPG_UV | 94 | % | POWER GOOD (% of FB voltage) | 5 | ||
| Power-good flag under voltage tripping threshold (power bad) | VPG_UV | 92 | % | POWER BAD (% of FB voltage) | 5 | ||
| Power-good flag over voltage tripping threshold (power bad) | VPG_OV | 109 | % | POWER BAD (% of FB voltage) | 5 | ||
| Power-good flag over voltage tripping threshold (power good) | VPG_OV | 107 | % | POWER GOOD (% of FB voltage) | 5 | ||
| Power-good flag recovery hysteresis | VPG_HYS | 2 | % | % of FB voltage | 5 | ||
| PGOOD low level output voltage | VPG_LOW | 0.1 | V | IPull-Up = 1 mA | 5 | ||
| SYNC clock high level threshold | VSYNC_HI | 1.7 | V | 6 | |||
| SYNC clock low level threshold | VSYNC_LO | 0.5 | V | 6 | |||
| Minimum controllable on time | TON_MIN | 75 | ns | VIN = 12 V, ILoad = 1 A | 6 | ||
| Maximum duty cycle | DMAX | 97 | % | fSW = 200 kHz | 6 | ||
| Thermal shutdown threshold | TSHDN | 170 | °C | 6 | |||
| Junction-to-ambient thermal resistance (DPR WSON-10) | RθJA | 36.5 | °C/W | 5 | |||
| Junction-to-top characterization parameter (DPR WSON-10) | ψJT | 0.3 | °C/W | 5 | |||
| Junction-to-board characterization parameter (DPR WSON-10) | ψJB | 13.8 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance (DPR WSON-10) | RθJC(top) | 35.2 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance (DPR WSON-10) | RθJC(bot) | 3.1 | °C/W | 5 | |||
| Junction-to-board thermal resistance (DPR WSON-10) | RθJB | 13.6 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
LMR14020SQDPRRQ1 - Footprint:
Package_SON:WSON-10-1EP_4x4mm_P0.8mm_EP2.6x3mm - 3D model: WSON-10-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
lmr14020sqdprrq1-etched.step/lmr14020sqdprrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmr14020sqdprrq1.step/lmr14020sqdprrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
df73c2f69c193bc2, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).