component
LMP91050MMX
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLMP91050MMX
Texas Instruments · Analog To Digital Converters (ADCs) · VSSOP-10-0.5mm
LMP91050MMX from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Analog signal input, the input of the sensor signal path from the thermopile. |
| 2 | CMOUT | output | Analog common-mode voltage output, adjustable to 1.15 V or 2.59 V to increase output dynamic range. |
| 3 | A0 | output | First stage output, used for external filtering (high-pass, lowpass or bandpass) to remove out-of-band noise. |
| 4 | A1 | input | Second stage input, used for external filtering (high-pass, lowpass or bandpass) to remove out-of-band noise. |
| 5 | GND | power_in | Power ground. |
| 6 | OUT | output | Signal output, referenced to the same potential as CMOUT. |
| 7 | CSB | input | Chip select, active low, for the SPI interface. |
| 8 | SCLK | input | Interface clock for the SPI interface. |
| 9 | SDIO | bidirectional | Serial data input/output for the SPI interface. |
| 10 | VDD | power_in | Positive supply, 2.7 V to 5.5 V per the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VDD) | VDD | -0.3 | 6 | V | 3 | ||
| Voltage at Any Pin | -0.3 | V | Upper limit printed as VDD + 0.3 V | 3 | |||
| Input Current at Any Pin | 5 | mA | 3 | ||||
| Junction Temperature | 150 | °C | 3 | ||||
| Storage Temperature | Tstg | -65 | 150 | °C | 3 | ||
| Supply Voltage | 2.7 | 5.5 | V | 4 | |||
| Junction Temperature | -40 | 105 | °C | 4 | |||
| VDD Supply voltage | VDD | 2.7 | 3.3 | 5.5 | V | 4 | |
| IDD Supply current | IDD | 3.1 | 3.7 | 4.2 | mA | All analog block ON | 4 |
| Power-down supply current | 45 | 85 | 121 | μA | All analog block OFF | 4 | |
| DNL | DNL | -1 | 2 | LSB | 4 | ||
| Error (output referred offset error) | -100 | 100 | mV | Output referred offset error, all gains | 4 | ||
| Max input signal high-gain mode | VINMAX | -2 | 2 | mV | Referenced to CMOUT voltage, high-gain mode | 5 | |
| Max input signal low-gain mode | VINMAX | -12 | 12 | mV | Referenced to CMOUT voltage, low-gain mode | 5 | |
| Gain (PGA2 second stage) | G | 4 | 32 | V/V | Programmable in 4 steps | 5 | |
| Gain temp coefficient | TCCGE | 100 | ppm/°C | TA = -40°C to +85°C | 6 | ||
| Output offset voltage temperature drift | TCVOS | -0.525 | 0.525 | mV/°C | Gain = 167 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -0.6 | 0.6 | mV/°C | Gain = 335 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -0.9 | 0.9 | mV/°C | Gain = 669 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -1.5 | 1.5 | mV/°C | Gain = 1335 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -1.2 | 1.2 | mV/°C | Gain = 1002 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -1.9 | 1.9 | mV/°C | Gain = 2004 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -3.7 | 3.7 | mV/°C | Gain = 4003 V/V, TA = -40°C to +85°C | 6 | |
| Output offset voltage temperature drift | TCVOS | -7.1 | 7.1 | mV/°C | Gain = 7986 V/V, TA = -40°C to +85°C | 6 | |
| Logic input low | VIL | 0.8 | V | 6 | |||
| Logic output high | VOH | 2.6 | V | 6 | |||
| Logic output low | VOL | 0.4 | V | 6 | |||
| Input digital leakage current | IIH/IIL | -100 | 100 | nA | 6 | ||
| Input digital leakage current | IIH/IIL | -200 | 200 | nA | TA = -40°C to +85°C | 6 | |
| Thermal resistance junction-to-ambient | RθJA | 176 | °C/W | DGS (VSSOP) 10 pins | 4 |
CAD (KiCad official)
- Symbol:
LMP91050MMX - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files:
lmp91050mmx-etched.step/lmp91050mmx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmp91050mmx.step/lmp91050mmx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
6ddcc72f0efbe8b1, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).